From: Dave Hansen <dave.hansen@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Joerg Roedel <jroedel@suse.de>,
David Rientjes <rientjes@google.com>,
Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Jon Grimm <jon.grimm@amd.com>,
Thomas Gleixner <tglx@linutronix.de>,
Christoph Hellwig <hch@lst.de>,
Paolo Bonzini <pbonzini@redhat.com>,
Ingo Molnar <mingo@redhat.com>,
x86@kernel.org, linux-mm@kvack.org
Subject: Re: AMD SEV-SNP/Intel TDX: validation of memory pages
Date: Fri, 12 Feb 2021 10:46:34 -0800 [thread overview]
Message-ID: <2ab1de5b-58bb-30f9-7fd7-9d3a7efa7d36@intel.com> (raw)
In-Reply-To: <YCbHSW1VPQqaU1M4@google.com>
On 2/12/21 10:22 AM, Sean Christopherson wrote:
>> If anyone knows of any way for a HV to inject #VE in the syscall gap,
>> please speak up. Better to know now.
> Removing and reinserting the SYSCALL page (or any other page touched in the
> SYSCALL gap) will result in a #VE, as TDX behavior is to generate a #VE on an
> access to an unaccepated.
>
> Andy L pointed out this conundrum a while back. My hack idea to "solve" this
> was to add an API to the TDX-Module that would allow the guest kernel to define
> a set of GPAs that must never #VE.
>
> https://lkml.kernel.org/r/20200825171903.GA20660@sjchrist-ice
Reminds me of the "what has to be mapped into userspace?" exercise for
PTI. That was fun.
Really, the hypervisor shouldn't be able to cause #VE's. This should be
fatal to the guest, period. Or, worst case scenario, Linux should be
able to set a bit that says, I will only run under sane hypervisors. If
I somehow lose a bet and get a crappy, insane hypervisor, I want take my
ball and go home: don't even bother running me any more.
No way do we want another fragile list of magic pages that we have to
maintain.
next prev parent reply other threads:[~2021-02-12 18:46 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-02 1:51 AMD SEV-SNP/Intel TDX: validation of memory pages David Rientjes
2021-02-02 13:17 ` Matthew Wilcox
2021-02-02 16:02 ` Kirill A. Shutemov
2021-02-03 0:16 ` Brijesh Singh
2021-02-11 17:46 ` Sean Christopherson
2021-02-02 22:37 ` Andi Kleen
2021-02-11 20:46 ` Peter Zijlstra
2021-02-12 13:19 ` Joerg Roedel
2021-02-12 14:17 ` Peter Zijlstra
2021-02-12 14:53 ` Joerg Roedel
2021-02-12 15:19 ` Peter Zijlstra
2021-02-12 15:28 ` Joerg Roedel
2021-02-12 16:12 ` Peter Zijlstra
2021-02-12 16:18 ` Joerg Roedel
2021-02-12 16:45 ` Peter Zijlstra
2021-02-12 17:48 ` Dave Hansen
2021-02-12 18:22 ` Sean Christopherson
2021-02-12 18:38 ` Andy Lutomirski
2021-02-12 18:43 ` Sean Christopherson
2021-02-12 18:46 ` Dave Hansen [this message]
2021-02-12 19:24 ` Sean Christopherson
2021-02-16 10:00 ` Joerg Roedel
2021-02-16 14:27 ` Andi Kleen
2021-02-16 14:46 ` Peter Zijlstra
2021-02-16 15:59 ` Paolo Bonzini
2021-02-16 16:25 ` Joerg Roedel
2021-02-16 16:48 ` Paolo Bonzini
2021-02-16 18:26 ` Joerg Roedel
2021-02-16 18:33 ` Paolo Bonzini
2021-02-16 16:47 ` Peter Zijlstra
2021-02-16 16:57 ` Andy Lutomirski
2021-02-16 17:05 ` Paolo Bonzini
2021-02-16 16:55 ` Andi Kleen
2021-02-12 21:42 ` Andi Kleen
2021-02-12 21:58 ` Peter Zijlstra
2021-02-12 22:39 ` Andi Kleen
2021-02-12 22:46 ` Andy Lutomirski
2021-02-13 9:38 ` Peter Zijlstra
2021-02-12 23:51 ` Paolo Bonzini
2021-03-23 9:33 ` Joerg Roedel
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