From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA44DC56202 for ; Wed, 21 Oct 2020 14:42:26 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 351B1208B8 for ; Wed, 21 Oct 2020 14:42:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ffwll.ch header.i=@ffwll.ch header.b="OFfWjJvd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 351B1208B8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ffwll.ch Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 537836B005C; Wed, 21 Oct 2020 10:42:25 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 50FCD6B005D; Wed, 21 Oct 2020 10:42:25 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 3FD656B0068; Wed, 21 Oct 2020 10:42:25 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0245.hostedemail.com [216.40.44.245]) by kanga.kvack.org (Postfix) with ESMTP id 146236B005C for ; Wed, 21 Oct 2020 10:42:25 -0400 (EDT) Received: from smtpin01.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay04.hostedemail.com (Postfix) with ESMTP id 99D931E12 for ; Wed, 21 Oct 2020 14:42:24 +0000 (UTC) X-FDA: 77396198208.01.hair00_2803bfd27249 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin01.hostedemail.com (Postfix) with ESMTP id 537301004A082 for ; Wed, 21 Oct 2020 14:42:24 +0000 (UTC) X-HE-Tag: hair00_2803bfd27249 X-Filterd-Recvd-Size: 6754 Received: from mail-oo1-f68.google.com (mail-oo1-f68.google.com [209.85.161.68]) by imf01.hostedemail.com (Postfix) with ESMTP for ; Wed, 21 Oct 2020 14:42:23 +0000 (UTC) Received: by mail-oo1-f68.google.com with SMTP id f26so587167oou.11 for ; Wed, 21 Oct 2020 07:42:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=AfTAgHtdVyrAaS1/nhVnFIFYQUqkwRIKER1d/mcr31s=; b=OFfWjJvd0e4xoMAnKosQZX6u4yueJkvQajrGY1gnJgHtnDIJWFT6fq0RgYnrDwWRw+ gRHeZQoM62EreIDByRy+hh+RB9j+SqRdJPUlf5qW1UjkGm+tTrGcfzuZz+PumuavbfPc b7fWM4FcGBuAVp+/h1VQnDUxVv4jkFf54gZSo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=AfTAgHtdVyrAaS1/nhVnFIFYQUqkwRIKER1d/mcr31s=; b=ov1BAJoacsDoAFoEuZ1Q9fFF/QPVVhDgajSwf9ijwduq8HZ26U61SydZKd9RMHnyyq FRCOw2fJ2FksIhIFRrnE+5hcjkL4gfvvDPP3wHdGJfeIZ+NOMaHw3jVWEfLbptAEKx7O /bVagsMvUh72ScHlpjcG3u7LD6x9EYyl7llL7E7A2DVWRrAkA/RLdzT73r8zS5XOs/M/ lRYRlMthFrFIF0GigWRnqmNfyMLoj6VjqgqHAfMUqBvgIG5tEHBN+NalRIVtKoc4XLNf c1CS9dpfqjktS2nGLSqGoqnu5fAZ6UTbCSM+/jcKcB9JoPvbOygN2gAM/Vcq+gMG2/gC sYAg== X-Gm-Message-State: AOAM530C2XW7zvTIgJOd9ug+DxWCzaTQj9UQ4zMnoVuCmfkeZe5u6S0f enuRxr5z7Ikf8r3pB9cJta22/9fNh1hmXhXB1o9MIw== X-Google-Smtp-Source: ABdhPJycyct2TB9wVg2Ih3Z02FAHwtZsXVwJzQ0pYxum/KMQuFJw++9YeXuYFSUooQTyT8GemxYhpDCSqAKwx53jYrg= X-Received: by 2002:a4a:e1d7:: with SMTP id n23mr2839407oot.85.1603291342907; Wed, 21 Oct 2020 07:42:22 -0700 (PDT) MIME-Version: 1.0 References: <20201021085655.1192025-1-daniel.vetter@ffwll.ch> <20201021085655.1192025-13-daniel.vetter@ffwll.ch> <20201021125030.GK36674@ziepe.ca> In-Reply-To: <20201021125030.GK36674@ziepe.ca> From: Daniel Vetter Date: Wed, 21 Oct 2020 16:42:11 +0200 Message-ID: Subject: Re: [PATCH v3 12/16] PCI: Obey iomem restrictions for procfs mmap To: Jason Gunthorpe Cc: DRI Development , LKML , KVM list , Linux MM , Linux ARM , linux-samsung-soc , "open list:DMA BUFFER SHARING FRAMEWORK" , linux-s390 , Daniel Vetter , Kees Cook , Dan Williams , Andrew Morton , John Hubbard , =?UTF-8?B?SsOpcsO0bWUgR2xpc3Nl?= , Jan Kara , Bjorn Helgaas , Linux PCI , Daniel Vetter Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Wed, Oct 21, 2020 at 2:50 PM Jason Gunthorpe wrote: > > On Wed, Oct 21, 2020 at 10:56:51AM +0200, Daniel Vetter wrote: > > There's three ways to access PCI BARs from userspace: /dev/mem, sysfs > > files, and the old proc interface. Two check against > > iomem_is_exclusive, proc never did. And with CONFIG_IO_STRICT_DEVMEM, > > this starts to matter, since we don't want random userspace having > > access to PCI BARs while a driver is loaded and using it. > > > > Fix this by adding the same iomem_is_exclusive() check we already have > > on the sysfs side in pci_mmap_resource(). > > > > References: 90a545e98126 ("restrict /dev/mem to idle io memory ranges") > > Signed-off-by: Daniel Vetter > > Cc: Jason Gunthorpe > > Cc: Kees Cook > > Cc: Dan Williams > > Cc: Andrew Morton > > Cc: John Hubbard > > Cc: J=C3=A9r=C3=B4me Glisse > > Cc: Jan Kara > > Cc: Dan Williams > > Cc: linux-mm@kvack.org > > Cc: linux-arm-kernel@lists.infradead.org > > Cc: linux-samsung-soc@vger.kernel.org > > Cc: linux-media@vger.kernel.org > > Cc: Bjorn Helgaas > > Cc: linux-pci@vger.kernel.org > > Signed-off-by: Daniel Vetter > > Maybe not for fixing in this series, but this access to > IORESOURCE_BUSY doesn't have any locking. > > The write side holds the resource_lock at least.. > > > ret =3D pci_mmap_page_range(dev, i, vma, > > fpriv->mmap_state, write_combine); > > At this point the vma isn't linked into the address space, so doesn't > this happen? > > CPU 0 CPU1 > mmap_region() > vma =3D vm_area_alloc > proc_bus_pci_mmap > iomem_is_exclusive > pci_mmap_page_range > revoke_devmem > unmap_mapping_range() > // vma is not linked to the address space here, > // unmap doesn't find it > vma_link() > !!! The VMA gets mapped with the revoked PTEs > > I couldn't find anything that prevents it at least, no mmap_sem on the > unmap side, just the i_mmap_lock > > Not seeing how address space and pre-populating during mmap work > together? Did I miss locking someplace? > > Not something to be fixed for this series, this is clearly an > improvement, but seems like another problem to tackle? Uh yes. In drivers/gpu this isn't a problem because we only install ptes from the vm_ops->fault handler. So no races. And I don't think you can fix this otherwise through holding locks: mmap_sem we can't hold because before vma_link we don't even know which mm_struct is involved, so can't solve the race. Plus this would be worse that mm_take_all_locks used by mmu notifier. And the address_space i_mmap_lock is also no good since it's not held during the ->mmap callback, when we write the ptes. And the resource locks is even less useful, since we're not going to hold that at vma_link() time for sure. Hence delaying the pte writes after the vma_link, which means ->fault time, looks like the only way to close this gap. Trouble is I have no idea how to do this cleanly ... -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch