From: Jason Gunthorpe <jgg@ziepe.ca>
To: Alistair Popple <apopple@nvidia.com>
Cc: akpm@linux-foundation.org, ajd@linux.ibm.com,
catalin.marinas@arm.com, fbarrat@linux.ibm.com,
iommu@lists.linux.dev, jhubbard@nvidia.com, kevin.tian@intel.com,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mm@kvack.org,
linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au,
nicolinc@nvidia.com, npiggin@gmail.com, robin.murphy@arm.com,
seanjc@google.com, will@kernel.org, x86@kernel.org,
zhi.wang.linux@gmail.com, sj@kernel.org
Subject: Re: [PATCH v3 3/5] mmu_notifiers: Call invalidate_range() when invalidating TLBs
Date: Fri, 21 Jul 2023 16:27:04 -0300 [thread overview]
Message-ID: <ZLrcCI5fyBcj2myR@ziepe.ca> (raw)
In-Reply-To: <86a0bf86394f1765fcbf9890bbabb154ba8dd980.1689842332.git-series.apopple@nvidia.com>
On Thu, Jul 20, 2023 at 06:39:25PM +1000, Alistair Popple wrote:
> The invalidate_range() is going to become an architecture specific mmu
> notifier used to keep the TLB of secondary MMUs such as an IOMMU in
> sync with the CPU page tables. Currently it is called from separate
> code paths to the main CPU TLB invalidations. This can lead to a
> secondary TLB not getting invalidated when required and makes it hard
> to reason about when exactly the secondary TLB is invalidated.
>
> To fix this move the notifier call to the architecture specific TLB
> maintenance functions for architectures that have secondary MMUs
> requiring explicit software invalidations.
>
> This fixes a SMMU bug on ARM64. On ARM64 PTE permission upgrades
> require a TLB invalidation. This invalidation is done by the
> architecutre specific ptep_set_access_flags() which calls
> flush_tlb_page() if required. However this doesn't call the notifier
> resulting in infinite faults being generated by devices using the SMMU
> if it has previously cached a read-only PTE in it's TLB.
>
> Moving the invalidations into the TLB invalidation functions ensures
> all invalidations happen at the same time as the CPU invalidation. The
> architecture specific flush_tlb_all() routines do not call the
> notifier as none of the IOMMUs require this.
>
> Signed-off-by: Alistair Popple <apopple@nvidia.com>
> Suggested-by: Jason Gunthorpe <jgg@ziepe.ca>
> Tested-by: SeongJae Park <sj@kernel.org>
> ---
> arch/arm64/include/asm/tlbflush.h | 5 +++++
> arch/powerpc/include/asm/book3s/64/tlbflush.h | 1 +
> arch/powerpc/mm/book3s64/radix_hugetlbpage.c | 1 +
> arch/powerpc/mm/book3s64/radix_tlb.c | 6 ++++++
> arch/x86/include/asm/tlbflush.h | 2 ++
> arch/x86/mm/tlb.c | 2 ++
> include/asm-generic/tlb.h | 1 -
> 7 files changed, 17 insertions(+), 1 deletion(-)
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Jason
next prev parent reply other threads:[~2023-07-21 19:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-20 8:39 [PATCH v3 0/5] Invalidate secondary IOMMU TLB on permission upgrade Alistair Popple
2023-07-20 8:39 ` [PATCH v3 1/5] arm64/smmu: Use TLBI ASID when invalidating entire range Alistair Popple
2023-07-21 19:25 ` Jason Gunthorpe
2023-07-20 8:39 ` [PATCH v3 2/5] mmu_notifiers: Fixup comment in mmu_interval_read_begin() Alistair Popple
2023-07-21 19:26 ` Jason Gunthorpe
2023-07-20 8:39 ` [PATCH v3 3/5] mmu_notifiers: Call invalidate_range() when invalidating TLBs Alistair Popple
2023-07-21 18:25 ` Catalin Marinas
2023-07-21 19:27 ` Jason Gunthorpe [this message]
2023-07-20 8:39 ` [PATCH v3 4/5] mmu_notifiers: Don't invalidate secondary TLBs as part of mmu_notifier_invalidate_range_end() Alistair Popple
2023-07-21 19:29 ` Jason Gunthorpe
2023-07-20 8:39 ` [PATCH v3 5/5] mmu_notifiers: Rename invalidate_range notifier Alistair Popple
2023-07-21 18:25 ` Catalin Marinas
2023-07-21 19:31 ` Jason Gunthorpe
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