From: Ram Prakash Gupta <rampraka@codeaurora.org>
To: asutoshd@codeaurora.org, stummala@codeaurora.org,
sayalil@codeaurora.org, rampraka@codeaurora.org,
vbadigan@codeaurora.org, cang@codeaurora.org,
ppvk@codeaurora.org, adrian.hunter@intel.com,
ulf.hansson@linaro.org, robh+dt@kernel.org,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [RFC 6/6] dt-bindings: mmc: sdhci-msm: Add clk scaling dt parameters
Date: Mon, 21 Oct 2019 19:59:37 +0530 [thread overview]
Message-ID: <1571668177-3766-7-git-send-email-rampraka@codeaurora.org> (raw)
In-Reply-To: <1571668177-3766-1-git-send-email-rampraka@codeaurora.org>
Adding clk scaling dt parameters.
Signed-off-by: Ram Prakash Gupta <rampraka@codeaurora.org>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index da4edb1..afaf88d 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -39,6 +39,21 @@ Required properties:
"cal" - reference clock for RCLK delay calibration (optional)
"sleep" - sleep clock for RCLK delay calibration (optional)
+Optional properties:
+- devfreq,freq-table - specifies supported frequencies for clock scaling.
+ Clock scaling logic shall toggle between these frequencies based
+ on card load. In case the defined frequencies are over or below
+ the supported card frequencies, they will be overridden
+ during card init. In case this entry is not supplied,
+ the driver will construct one based on the card
+ supported max and min frequencies.
+ The frequencies must be ordered from lowest to highest.
+
+- scaling-lower-bus-speed-mode - Few hosts can support DDR52 mode at the
+ same lower system voltage corner as high-speed mode. In such
+ cases, it is always better to put it in DDR mode which will
+ improve the performance without any power impact.
+
Example:
sdhc_1: sdhci@f9824900 {
@@ -56,6 +71,10 @@ Example:
clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
+
+ devfreq,freq-table = <50000000 200000000>;
+ scaling-lower-bus-speed-mode = "DDR52"
+
};
sdhc_2: sdhci@f98a4900 {
--
1.9.1
next prev parent reply other threads:[~2019-10-21 14:29 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-21 14:29 [RFC 0/6] mmc: Add clock scaling support for mmc driver Ram Prakash Gupta
2019-10-21 14:29 ` [RFC 1/6] mmc: core: Parse clk scaling dt entries Ram Prakash Gupta
2019-10-21 14:29 ` [RFC 2/6] mmc: core: Add core scaling support in driver Ram Prakash Gupta
2019-10-21 14:29 ` [RFC 3/6] mmc: core: Initialize clk scaling for mmc and SDCard Ram Prakash Gupta
2019-10-21 14:29 ` [RFC 4/6] mmc: core: Add debugfs entries for scaling support Ram Prakash Gupta
2019-10-21 14:29 ` [RFC 5/6] mmc: sdhci-msm: Add capability in platform host Ram Prakash Gupta
2019-10-21 14:29 ` Ram Prakash Gupta [this message]
2019-10-29 16:36 ` [RFC 6/6] dt-bindings: mmc: sdhci-msm: Add clk scaling dt parameters Rob Herring
2019-10-22 8:40 ` [RFC 0/6] mmc: Add clock scaling support for mmc driver Ulf Hansson
[not found] ` <5c78cc29-deb1-4cea-5b30-6f7538ca4703@codeaurora.org>
2019-11-15 17:39 ` Doug Anderson
2019-11-29 8:10 ` rampraka
2019-12-04 2:09 ` Doug Anderson
2019-11-29 7:34 ` rampraka
[not found] ` <0101016eb6152d19-fa1453b7-ae71-49d7-b13b-8c4009375ee1-000000@us-west-2.amazonses.com>
2019-12-18 15:11 ` Ulf Hansson
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