From: Adrian Hunter <adrian.hunter@intel.com>
To: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>,
"Ulf Hansson" <ulf.hansson@linaro.org>
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] mmc: sdhci: fix minimum clock rate for v3 controller
Date: Wed, 15 Jan 2020 12:01:57 +0200 [thread overview]
Message-ID: <5ce78487-e60a-1ad5-4a12-5d068994416a@intel.com> (raw)
In-Reply-To: <ffb489519a446caffe7a0a05c4b9372bd52397bb.1579082031.git.mirq-linux@rere.qmqm.pl>
On 15/01/20 11:54 am, Michał Mirosław wrote:
> For SDHCIv3+ with programmable clock mode, minimal clock frequency is
> still base clock / max(divider). Minimal programmable clock frequency is
> always greater than minimal divided clock frequency. Without this patch,
> SDHCI uses out-of-spec initial frequency when multiplier is big enough:
>
> mmc1: mmc_rescan_try_freq: trying to init card at 468750 Hz
> [for 480 MHz source clock divided by 1024]
>
> The code in sdhci_calc_clk() already chooses a correct SDCLK clock mode.
>
> Cc: stable@vger.kernel.org
> Fixes: c3ed3877625f ("mmc: sdhci: add support for programmable clock mode")
> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> v3: commitmsg/comment rewording
> v2: extend commitmsg and add comment
> ---
> drivers/mmc/host/sdhci.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 96609c961465..24fb6d710de6 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -3903,11 +3903,13 @@ int sdhci_setup_host(struct sdhci_host *host)
> if (host->ops->get_min_clock)
> mmc->f_min = host->ops->get_min_clock(host);
> else if (host->version >= SDHCI_SPEC_300) {
> - if (host->clk_mul) {
> - mmc->f_min = (host->max_clk * host->clk_mul) / 1024;
> + if (host->clk_mul)
> max_clk = host->max_clk * host->clk_mul;
> - } else
> - mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
> + /*
> + * Divided Clock Mode minimum clock rate is always less than
> + * Programmable Clock Mode minimum clock rate.
> + */
> + mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
> } else
> mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200;
>
>
next prev parent reply other threads:[~2020-01-15 10:02 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-15 9:54 [PATCH v3] mmc: sdhci: fix minimum clock rate for v3 controller Michał Mirosław
2020-01-15 10:01 ` Adrian Hunter [this message]
2020-01-16 14:39 ` Ulf Hansson
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