From: <Tudor.Ambarus@microchip.com>
To: <marek.vasut@gmail.com>, <vigneshr@ti.com>,
<boris.brezillon@collabora.com>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: Tudor.Ambarus@microchip.com
Subject: [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support
Date: Fri, 23 Aug 2019 16:05:01 +0000 [thread overview]
Message-ID: <20190823160452.14905-1-tudor.ambarus@microchip.com> (raw)
From: Tudor Ambarus <tudor.ambarus@microchip.com>
This is similar with what other nor flashes are doing by clearing the
block protection bits from the status register: disable the write
protection after a power-on reset cycle.
The Global Block-Protection Unlock command offers a single command cycle
that unlocks the entire memory array. Prefer this method for higher
throughput.
Tested on the sst26vf064b flash using the atmel-quadspi driver.
Tudor Ambarus (2):
mtd: spi-nor: add Global Block Unlock support
mtd: spi-nor: unlock global block protection on sst26vf064b
drivers/mtd/spi-nor/spi-nor.c | 51 +++++++++++++++++++++++++++++++++++++++++--
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 50 insertions(+), 2 deletions(-)
--
2.9.5
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next reply other threads:[~2019-08-23 16:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-23 16:05 Tudor.Ambarus [this message]
2019-08-23 16:05 ` [PATCH 1/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 2/2] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
2019-08-23 16:07 ` [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
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