From: "Cédric Le Goater" <clg@kaod.org>
To: linux-mtd@lists.infradead.org,
Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
linux-aspeed@lists.ozlabs.org, "Andrew Jeffery" <andrew@aj.id.au>,
"Richard Weinberger" <richard@nod.at>,
"Marek Vasut" <marek.vasut@gmail.com>,
"Joel Stanley" <joel@jms.id.au>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Brian Norris" <computersforpeace@gmail.com>,
"David Woodhouse" <dwmw2@infradead.org>,
linux-arm-kernel@lists.infradead.org,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PATCH 09/16] mtd: spi-nor: aspeed: Introduce a field for the AHB physical address
Date: Fri, 4 Oct 2019 13:59:12 +0200 [thread overview]
Message-ID: <20191004115919.20788-10-clg@kaod.org> (raw)
In-Reply-To: <20191004115919.20788-1-clg@kaod.org>
On the AST2600, we will use this field to compute the address of the
chip AHB window from the Segment Register value. It also removes the
need of aspeed_smc_ahb_base_phy() helper.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
---
drivers/mtd/spi-nor/aspeed-smc.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
index add95a9aca76..c5a0c8d94371 100644
--- a/drivers/mtd/spi-nor/aspeed-smc.c
+++ b/drivers/mtd/spi-nor/aspeed-smc.c
@@ -121,7 +121,8 @@ struct aspeed_smc_controller {
struct mutex mutex; /* controller access mutex */
const struct aspeed_smc_info *info; /* type info of controller */
void __iomem *regs; /* controller registers */
- void __iomem *ahb_base; /* per-chip windows resource */
+ void __iomem *ahb_base; /* per-chip window resource */
+ u32 ahb_base_phy; /* phys addr of AHB window */
u32 ahb_window_size; /* full mapping window size */
unsigned long clk_frequency;
@@ -533,21 +534,13 @@ static void __iomem *aspeed_smc_chip_base(struct aspeed_smc_chip *chip,
return controller->ahb_base + offset;
}
-static u32 aspeed_smc_ahb_base_phy(struct aspeed_smc_controller *controller)
-{
- u32 seg0_val = readl(SEGMENT_ADDR_REG(controller, 0));
-
- return SEGMENT_ADDR_START(seg0_val);
-}
-
static u32 chip_set_segment(struct aspeed_smc_chip *chip, u32 cs, u32 start,
u32 size)
{
struct aspeed_smc_controller *controller = chip->controller;
void __iomem *seg_reg;
- u32 seg_oldval, seg_newval, ahb_base_phy, end;
-
- ahb_base_phy = aspeed_smc_ahb_base_phy(controller);
+ u32 seg_oldval, seg_newval, end;
+ u32 ahb_base_phy = controller->ahb_base_phy;
seg_reg = SEGMENT_ADDR_REG(controller, cs);
seg_oldval = readl(seg_reg);
@@ -636,7 +629,7 @@ static u32 aspeed_smc_chip_set_segment(struct aspeed_smc_chip *chip)
chip->cs, size >> 20);
}
- ahb_base_phy = aspeed_smc_ahb_base_phy(controller);
+ ahb_base_phy = controller->ahb_base_phy;
/*
* As a start address for the current segment, use the default
@@ -1158,6 +1151,7 @@ static int aspeed_smc_probe(struct platform_device *pdev)
return PTR_ERR(controller->regs);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ controller->ahb_base_phy = res->start;
controller->ahb_base = devm_ioremap_resource(dev, res);
if (IS_ERR(controller->ahb_base))
return PTR_ERR(controller->ahb_base);
--
2.21.0
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next prev parent reply other threads:[~2019-10-04 12:05 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-04 11:59 [PATCH 00/16] mtd: spi-nor: aspeed: AST2600 support and extensions Cédric Le Goater
2019-10-04 11:59 ` [PATCH 01/16] mtd: spi-nor: aspeed: Use command mode for reads Cédric Le Goater
2019-10-04 11:59 ` [PATCH 02/16] mtd: spi-nor: aspeed: Add support for SPI dual IO read mode Cédric Le Goater
2019-10-04 11:59 ` [PATCH 03/16] mtd: spi-nor: aspeed: Link controller with the ahb clock Cédric Le Goater
2019-10-04 11:59 ` [PATCH 04/16] mtd: spi-nor: aspeed: Add read training Cédric Le Goater
2019-10-11 12:28 ` Boris Brezillon
2019-10-11 13:13 ` Vignesh Raghavendra
2019-10-11 14:03 ` Cédric Le Goater
2019-10-11 13:55 ` Cédric Le Goater
2019-10-11 14:29 ` Boris Brezillon
2019-10-11 14:37 ` Cédric Le Goater
2019-10-04 11:59 ` [PATCH 05/16] mtd: spi-nor: aspeed: Limit the maximum SPI frequency Cédric Le Goater
2019-10-04 11:59 ` [PATCH 06/16] mtd: spi-nor: fix options for mx66l51235f Cédric Le Goater
2019-10-04 16:23 ` Cédric Le Goater
2019-10-04 11:59 ` [PATCH 07/16] mtd: spi-nor: aspeed: Add support for the 4B opcodes Cédric Le Goater
2019-10-04 11:59 ` [PATCH 08/16] mtd: spi-nor: Add support for w25q512jv Cédric Le Goater
2019-10-04 11:59 ` Cédric Le Goater [this message]
2019-10-04 11:59 ` [PATCH 10/16] mtd: spi-nor: aspeed: Introduce segment operations Cédric Le Goater
2019-10-04 11:59 ` [PATCH 11/16] dt-bindings: mtd: aspeed-smc: Add new comptatible for AST2600 Cédric Le Goater
2019-10-15 19:26 ` Rob Herring
2019-10-04 11:59 ` [PATCH 12/16] mtd: spi-nor: aspeed: Add initial support for the AST2600 Cédric Le Goater
2019-10-04 11:59 ` [PATCH 13/16] mtd: spi-nor: aspeed: Check for disabled segments on " Cédric Le Goater
2019-10-04 12:09 ` [PATCH 14/16] mtd: spi-nor: aspeed: Introduce training operations per platform Cédric Le Goater
2019-10-04 12:09 ` [PATCH 15/16] mtd: spi-nor: aspeed: Introduce a HCLK mask for training Cédric Le Goater
2019-10-04 12:09 ` [PATCH 16/16] mtd: spi-nor: aspeed: Add read training support for the AST2600 Cédric Le Goater
2019-10-09 20:55 ` [PATCH 00/16] mtd: spi-nor: aspeed: AST2600 support and extensions Boris Brezillon
2019-10-10 23:47 ` Joel Stanley
2019-10-11 6:45 ` Boris Brezillon
2019-10-11 9:29 ` Cédric Le Goater
2019-10-11 9:51 ` Boris Brezillon
2019-10-11 11:47 ` Cédric Le Goater
2019-10-11 12:07 ` Boris Brezillon
2019-10-11 13:07 ` Cédric Le Goater
2019-10-11 14:01 ` Boris Brezillon
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