From: Mark Brown <broonie@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
Richard Weinberger <richard@nod.at>, Sekhar Nori <nsekhar@ti.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
linux-spi <linux-spi@vger.kernel.org>,
Boris Brezillon <boris.brezillon@collabora.com>,
MTD Maling List <linux-mtd@lists.infradead.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Pratyush Yadav <p.yadav@ti.com>
Subject: Re: [PATCH v2 01/11] dt-bindings: spi: allow expressing DTR capability
Date: Thu, 27 Feb 2020 16:44:25 +0000 [thread overview]
Message-ID: <20200227164425.GF4062@sirena.org.uk> (raw)
In-Reply-To: <CAMuHMdWMCDzQm0tjpybJZyHy4imbC9NqRXP5d4C0xgxQx-Pf8g@mail.gmail.com>
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On Thu, Feb 27, 2020 at 05:40:31PM +0100, Geert Uytterhoeven wrote:
> On Thu, Feb 27, 2020 at 5:28 PM Mark Brown <broonie@kernel.org> wrote:
> > It's what we do for other properties, and if this is anything like the
> > other things adding extra wiring you can't assume that the ability to
> > use the feature for TX implies RX.
> Double Transfer Rate uses the same wire.
But is it still on either the TX or RX signals?
> But as you sample at both the rising and the falling edges of the clock, this
> makes the cpha setting meaningless for such transfers, I think ;-)
Might affect what the first bit is possibly?
> However, as the future may bring us QDR, perhaps this should not be a
> boolean flag, but an integer value?
> Cfr. spi-tx-bus-width vs. the original spi-tx-dual/spi-tx-quad proposal.
> What would be a good name (as we only need one)? spi-data-phases?
Sounds reasonable, apart from the increasingly vague connection with
something that's recognizably SPI :P
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next prev parent reply other threads:[~2020-02-27 16:44 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-26 9:36 [PATCH v2 00/11] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 01/11] dt-bindings: spi: allow expressing DTR capability Pratyush Yadav
2020-02-27 16:11 ` Boris Brezillon
2020-02-27 16:28 ` Mark Brown
2020-02-27 16:40 ` Geert Uytterhoeven
2020-02-27 16:44 ` Mark Brown [this message]
2020-02-27 17:03 ` Geert Uytterhoeven
2020-03-02 9:53 ` Pratyush Yadav
2020-02-27 17:06 ` Boris Brezillon
2020-02-27 16:29 ` Geert Uytterhoeven
2020-02-28 9:46 ` Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 02/11] spi: set mode bits for "spi-rx-dtr" and "spi-tx-dtr" Pratyush Yadav
2020-02-27 16:23 ` Boris Brezillon
2020-03-02 9:48 ` Pratyush Yadav
2020-03-02 10:20 ` Boris Brezillon
2020-02-26 9:36 ` [PATCH v2 03/11] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-02-27 16:36 ` Boris Brezillon
2020-02-26 9:36 ` [PATCH v2 04/11] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-02-27 16:44 ` Boris Brezillon
2020-02-28 9:41 ` Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 05/11] spi: cadence-quadspi: Add support for octal DTR flashes Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 06/11] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-02-27 16:58 ` Boris Brezillon
2020-02-28 9:36 ` Pratyush Yadav
2020-02-28 10:53 ` Boris Brezillon
2020-02-28 12:07 ` Pratyush Yadav
2020-02-28 13:18 ` Boris Brezillon
2020-02-26 9:36 ` [PATCH v2 07/11] mtd: spi-nor: get command opcode extension type from BFPT Pratyush Yadav
2020-02-26 9:37 ` [PATCH v2 08/11] mtd: spi-nor: parse xSPI Profile 1.0 table Pratyush Yadav
2020-02-26 9:37 ` [PATCH v2 09/11] mtd: spi-nor: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-02-26 9:37 ` [PATCH v2 10/11] mtd: spi-nor: enable octal DTR mode when possible Pratyush Yadav
2020-02-26 9:37 ` [PATCH v2 11/11] mtd: spi-nor: add support for Cypress Semper flash Pratyush Yadav
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