From: Pratyush Yadav <me@yadavpratyush.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Pratyush Yadav <me@yadavpratyush.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v11 10/14] mtd: spi-nor: core: perform a Soft Reset on shutdown
Date: Thu, 23 Jul 2020 18:41:59 +0530 [thread overview]
Message-ID: <20200723131203.40916-11-me@yadavpratyush.com> (raw)
In-Reply-To: <20200723131203.40916-1-me@yadavpratyush.com>
From: Pratyush Yadav <p.yadav@ti.com>
Perform a Soft Reset on shutdown on flashes that support it so that the
flash can be reset to its initial state and any configurations made by
spi-nor (given that they're only done in volatile registers) will be
reset. This will hand back the flash in pristine state for any further
operations on it.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
drivers/mtd/spi-nor/core.c | 41 +++++++++++++++++++++++++++++++++++++
include/linux/mtd/spi-nor.h | 2 ++
2 files changed, 43 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index b990fc7add20..f55c062a7bd5 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -40,6 +40,9 @@
#define SPI_NOR_MAX_ADDR_WIDTH 4
+#define SPI_NOR_SRST_SLEEP_MIN 200
+#define SPI_NOR_SRST_SLEEP_MAX 400
+
/**
* spi_nor_get_cmd_ext() - Get the command opcode extension based on the
* extension type.
@@ -3155,6 +3158,41 @@ static int spi_nor_init(struct spi_nor *nor)
return 0;
}
+static void spi_nor_soft_reset(struct spi_nor *nor)
+{
+ struct spi_mem_op op;
+ int ret;
+
+ op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 8),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DATA);
+ spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ if (ret) {
+ dev_warn(nor->dev, "Software reset failed: %d\n", ret);
+ return;
+ }
+
+ op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 8),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DATA);
+ spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ if (ret) {
+ dev_warn(nor->dev, "Software reset failed: %d\n", ret);
+ return;
+ }
+
+ /*
+ * Software Reset is not instant, and the delay varies from flash to
+ * flash. Looking at a few flashes, most range somewhere below 100
+ * microseconds. So, sleep for a range of 200-400 us.
+ */
+ usleep_range(SPI_NOR_SRST_SLEEP_MIN, SPI_NOR_SRST_SLEEP_MAX);
+}
+
/* mtd resume handler */
static void spi_nor_resume(struct mtd_info *mtd)
{
@@ -3175,6 +3213,9 @@ void spi_nor_restore(struct spi_nor *nor)
nor->flags & SNOR_F_BROKEN_RESET)
nor->params->set_4byte_addr_mode(nor, false);
+ if (nor->flags & SNOR_F_SOFT_RESET)
+ spi_nor_soft_reset(nor);
+
spi_nor_quad_enable(nor, false);
}
EXPORT_SYMBOL_GPL(spi_nor_restore);
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index cd549042c53d..299685d15dc2 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -51,6 +51,8 @@
#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */
#define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */
#define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */
+#define SPINOR_OP_SRSTEN 0x66 /* Software Reset Enable */
+#define SPINOR_OP_SRST 0x99 /* Software Reset */
/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
--
2.27.0
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next prev parent reply other threads:[~2020-07-23 13:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-23 13:11 [PATCH v11 00/14] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 01/14] mtd: spi-nor: core: add spi_nor_{read, write}_reg() helpers Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 02/14] mtd: spi-nor: core: add spi_nor_controller_ops_erase helper Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 03/14] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 04/14] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 05/14] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 06/14] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 07/14] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 08/14] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 09/14] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-07-23 13:11 ` Pratyush Yadav [this message]
2020-07-23 13:12 ` [PATCH v11 11/14] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-07-23 13:12 ` [PATCH v11 12/14] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-07-23 13:12 ` [PATCH v11 13/14] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-07-23 13:12 ` [PATCH v11 14/14] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
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