From: Pratyush Yadav <p.yadav@ti.com>
To: Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
Michael Walle <michael@walle.cc>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Mark Brown <broonie@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mtd@lists.infradead.org>, <linux-spi@vger.kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Lokesh Vutla <lokeshvutla@ti.com>
Subject: [RFC PATCH 1/6] spi: spi-mem: Tell controller when device is ready for calibration
Date: Fri, 12 Mar 2021 00:42:11 +0530 [thread overview]
Message-ID: <20210311191216.7363-2-p.yadav@ti.com> (raw)
In-Reply-To: <20210311191216.7363-1-p.yadav@ti.com>
Some controllers like the Cadence OSPI controller need to perform a
calibration sequence to operate at high clock speeds. This calibration
should happen after the flash is fully initialized otherwise the
calibration might happen in a different SPI mode from the one the flash
is finally set to. Add a hook that can be used to tell the controller
when the flash is ready for calibration. Whether calibration is needed
depends on the controller.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
drivers/spi/spi-mem.c | 12 ++++++++++++
include/linux/spi/spi-mem.h | 8 ++++++++
2 files changed, 20 insertions(+)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index dc713b0c3c4d..e2f05ad3f4dc 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -464,6 +464,18 @@ int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
}
EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
+int spi_mem_do_calibration(struct spi_mem *mem, struct spi_mem_op *op)
+{
+ struct spi_controller *ctlr = mem->spi->controller;
+
+ if (!ctlr->mem_ops || !ctlr->mem_ops->do_calibration)
+ return -EOPNOTSUPP;
+
+ ctlr->mem_ops->do_calibration(mem, op);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(spi_mem_do_calibration);
+
static ssize_t spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc *desc,
u64 offs, size_t len, void *buf)
{
diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 2b65c9edc34e..97a2d280f2d0 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -250,6 +250,12 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem)
* the currently mapped area), and the caller of
* spi_mem_dirmap_write() is responsible for calling it again in
* this case.
+ * @do_calibration: perform calibration needed for high SPI clock speed
+ * operation. Should be called after the SPI memory device has
+ * been completely initialized. The op passed should contain
+ * a template for the read operation used for the device so
+ * the controller can decide what type of calibration is
+ * required for this type of read.
*
* This interface should be implemented by SPI controllers providing an
* high-level interface to execute SPI memory operation, which is usually the
@@ -274,6 +280,7 @@ struct spi_controller_mem_ops {
u64 offs, size_t len, void *buf);
ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc,
u64 offs, size_t len, const void *buf);
+ void (*do_calibration)(struct spi_mem *mem, struct spi_mem_op *op);
};
/**
@@ -346,6 +353,7 @@ bool spi_mem_dtr_supports_op(struct spi_mem *mem,
#endif /* CONFIG_SPI_MEM */
int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op);
+int spi_mem_do_calibration(struct spi_mem *mem, struct spi_mem_op *op);
bool spi_mem_supports_op(struct spi_mem *mem,
const struct spi_mem_op *op);
--
2.30.0
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next prev parent reply other threads:[~2021-03-11 19:13 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-11 19:12 [RFC PATCH 0/6] spi: Add OSPI PHY calibration support for spi-cadence-quadspi Pratyush Yadav
2021-03-11 19:12 ` Pratyush Yadav [this message]
2021-03-23 23:07 ` [RFC PATCH 1/6] spi: spi-mem: Tell controller when device is ready for calibration Michael Walle
2021-03-24 8:08 ` Pratyush Yadav
2021-04-29 16:23 ` Michael Walle
2021-04-29 18:41 ` Pratyush Yadav
2021-04-29 22:46 ` Michael Walle
2021-03-11 19:12 ` [RFC PATCH 2/6] mtd: spi-nor: core: consolidate read op creation Pratyush Yadav
2021-03-23 23:17 ` Michael Walle
2021-03-24 8:04 ` Pratyush Yadav
2021-04-08 12:48 ` Michael Walle
2021-03-11 19:12 ` [RFC PATCH 3/6] mtd: spi-nor: core: run calibration when initialization is done Pratyush Yadav
2022-05-17 14:02 ` Miquel Raynal
2022-05-18 6:07 ` Pratyush Yadav
2022-05-18 7:19 ` Miquel Raynal
2022-05-18 7:56 ` Pratyush Yadav
2022-05-18 8:51 ` Cédric Le Goater
2022-06-27 9:14 ` Pratyush Yadav
2022-06-27 9:43 ` Cédric Le Goater
2022-06-27 10:35 ` Pratyush Yadav
2021-03-11 19:12 ` [RFC PATCH 4/6] spi: cadence-qspi: Use PHY for DAC reads if possible Pratyush Yadav
2021-03-12 9:13 ` Tudor.Ambarus
2021-03-12 10:17 ` Pratyush Yadav
2021-04-29 16:28 ` Michael Walle
2021-04-29 18:19 ` Pratyush Yadav
2021-04-29 22:20 ` Michael Walle
2021-05-10 11:39 ` Pratyush Yadav
2021-03-11 19:12 ` [RFC PATCH 5/6] spi: cadence-qspi: Tune PHY to allow running at higher frequencies Pratyush Yadav
2021-04-29 22:48 ` Michael Walle
2021-04-30 5:42 ` Pratyush Yadav
2021-03-11 19:12 ` [RFC PATCH 6/6] arm64: dts: ti: k3-j721e-som-p0: Enable PHY calibration Pratyush Yadav
2021-03-12 9:09 ` [RFC PATCH 0/6] spi: Add OSPI PHY calibration support for spi-cadence-quadspi Tudor.Ambarus
2021-03-12 10:10 ` Pratyush Yadav
2021-03-12 10:20 ` Michael Walle
2021-03-12 11:07 ` Pratyush Yadav
2021-03-12 13:26 ` Michael Walle
2021-03-12 11:23 ` Tudor.Ambarus
2021-03-12 18:14 ` Pratyush Yadav
2021-03-12 13:32 ` Michael Walle
2021-03-12 14:59 ` Tudor.Ambarus
2021-03-12 17:00 ` Pratyush Yadav
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