From: <Tudor.Ambarus@microchip.com>
To: <bbrezillon@kernel.org>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
alexandre.belloni@bootlin.com, linux-kernel@vger.kernel.org,
Cyrille.Pitchen@microchip.com, Nicolas.Ferre@microchip.com,
robh+dt@kernel.org, linux-spi@vger.kernel.org,
Ludovic.Desroches@microchip.com, broonie@kernel.org,
linux-mtd@lists.infradead.org, bugalski.piotr@gmail.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller
Date: Mon, 4 Feb 2019 14:28:27 +0000 [thread overview]
Message-ID: <25f6ee72-e6e1-7014-6e4b-abe0a1a0eebc@microchip.com> (raw)
In-Reply-To: <20190204151643.0354180d@bbrezillon>
On 02/04/2019 04:16 PM, Boris Brezillon wrote:
> On Mon, 4 Feb 2019 10:10:21 +0000
> <Tudor.Ambarus@microchip.com> wrote:
>
>> +
>> +static void atmel_qspi_sam9x60_write_regs(const struct atmel_qspi *aq,
>> + const struct spi_mem_op *op,
>> + const struct atmel_qspi_cfg *cfg)
>> +{
>> + /* Clear pending interrupts */
>> + (void)readl_relaxed(aq->regs + QSPI_SR);
>> +
>> + /* Set QSPI Instruction Frame registers */
>> + writel_relaxed(cfg->iar, aq->regs + QSPI_IAR);
>> + if (op->data.dir == SPI_MEM_DATA_IN)
>> + writel_relaxed(cfg->icr, aq->regs + QSPI_RICR);
>> + else
>> + writel_relaxed(cfg->icr, aq->regs + QSPI_ICR);
>
> Can you use WICR here (even if ICR == WICR)?
yes, good catch.
>
>> + writel_relaxed(cfg->ifr, aq->regs + QSPI_IFR);
>> +}
>
> Hm, so the only difference we have is the RICR vs ICR reg and the
> APBTFRTYP_READ vs SAMA5D2_WRITE_TRSFR bit. Not sure it deserves
> creating 2 hooks for that. Can we have something like ->has_ricr in
> the caps and then have an if/else block directly in
> atmel_qspi_set_cfg()?
>
Correct. It is a cost of an extra if, I tried to avoid it. I like it better with
these two hooks, but if you have a strong opinion I'll do it, just confirm it again.
Thanks,
ta
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next prev parent reply other threads:[~2019-02-04 14:28 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-04 10:09 [PATCH v4 00/13] spi: atmel-quadspi: introduce sam9x60 qspi controller Tudor.Ambarus
2019-02-04 10:09 ` [PATCH v4 01/13] spi: atmel-quadspi: cache MR value to avoid a write access Tudor.Ambarus
2019-02-04 14:00 ` Boris Brezillon
2019-02-04 10:09 ` [PATCH v4 02/13] spi: atmel-quadspi: order header files inclusion alphabetically Tudor.Ambarus
2019-02-04 10:09 ` [PATCH v4 03/13] spi: atmel-quadspi: drop wrappers for iomem accesses Tudor.Ambarus
2019-02-04 10:09 ` [PATCH v4 04/13] spi: atmel-quadspi: fix naming scheme Tudor.Ambarus
2019-02-04 10:09 ` [PATCH v4 05/13] spi: atmel-quadspi: remove unnecessary cast Tudor.Ambarus
2019-02-04 10:09 ` [PATCH v4 06/13] spi: atmel-quadspi: return appropriate error code Tudor.Ambarus
2019-02-04 10:09 ` [PATCH v4 07/13] spi: atmel-quadspi: switch to SPDX license identifiers Tudor.Ambarus
2019-02-04 10:09 ` [PATCH v4 08/13] spi: atmel-quadspi: rework transfer macros Tudor.Ambarus
2019-02-04 14:01 ` Boris Brezillon
2019-02-04 10:09 ` [PATCH v4 09/13] dt-bindings: spi: atmel-quadspi: update example to new clock binding Tudor.Ambarus
2019-02-04 10:10 ` [PATCH v4 10/13] dt-bindings: spi: atmel-quadspi: make "pclk" mandatory Tudor.Ambarus
2019-02-04 10:10 ` [PATCH v4 11/13] spi: atmel-quadspi: add support for named peripheral clock Tudor.Ambarus
2019-02-04 10:10 ` [PATCH v4 12/13] dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 Tudor.Ambarus
2019-02-04 10:10 ` [PATCH v4 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller Tudor.Ambarus
2019-02-04 14:16 ` Boris Brezillon
2019-02-04 14:28 ` Tudor.Ambarus [this message]
2019-02-04 14:37 ` Boris Brezillon
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