Hi Tudor,

El 10/1/19 a les 18:21, Tudor.Ambarus@microchip.com ha escrit:
> Hi, Roger,
>
> On 12/27/2018 05:03 PM, Roger Pueyo Centelles wrote:
>> The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
>> on recent wireless routers. Its 32, 128 and 256 Mbit siblings
>> are alredy supported.
> s/alredy/already
>
>> Tested on a COMFAST CF-E120A v3 board.
>>
>> Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
>> ---
>>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 6e13bbd1aaa5..4bb6f4d203dc 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -1741,6 +1741,7 @@ static const struct flash_info spi_nor_ids[] = {
>>  	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
>>  	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
>>  	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
>> +	{ "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,  128, 0) },
> The flash supports 4KiB erase type, so you'll have to set SECT_4K. One can use
> larger sectors, when available, by disabling CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.

You're right, I'm setting it.

>
> Also, the flash supports SPINOR_OP_READ_1_1_2, so it's better to set
> SPI_NOR_DUAL_READ in order to trigger the bfpt parsing. Note that at bfpt
> parsing, SPINOR_OP_PP_1_4_4 will be enabled and the reads should be done with
> the ebh command. Please test if these assumptions are valid, and if correct,
> submit a new patch.

Do you mean that I just have to add SPI_NOR_DUAL_READ, and not
SPI_NOR_QUAD_READ also? The chip's datasheet [1] says it supports both
DUAL and QUAD modes; I tried setting both flags, and it works fine.

Cheers,

Roger

[1] http://www.bdtic.com/datasheet/EON/EN25QH64.pdf

>
> Cheers,
> ta