From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <richard@nod.at>,
<vigneshr@ti.com>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: boris.brezillon@collabora.com, nsekhar@ti.com
Subject: Re: [PATCH v13 09/15] mtd: spi-nor: core: enable octal DTR mode when possible
Date: Wed, 30 Sep 2020 07:11:16 +0000 [thread overview]
Message-ID: <47419443-fe8c-1046-ae04-d188560156c5@microchip.com> (raw)
In-Reply-To: <20200916124418.833-10-p.yadav@ti.com>
On 9/16/20 3:44 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Allow flashes to specify a hook to enable octal DTR mode. Use this hook
> whenever possible to get optimal transfer speeds.
We need to restrict the access to octal dtr enable for flashes that enter in
8-8-8 dtr mode via non-volatile bits. It's what I tried in RFC 1/3.
Looks good ;)
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> ---
> drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++
> drivers/mtd/spi-nor/core.h | 2 ++
> 2 files changed, 37 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 87c568debf14..6ee93544d72f 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3069,6 +3069,35 @@ static int spi_nor_init_params(struct spi_nor *nor)
> return 0;
> }
>
> +/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
> + * @nor: pointer to a 'struct spi_nor'
> + * @enable: whether to enable or disable Octal DTR
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> +static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
> +{
> + int ret;
> +
> + if (!nor->params->octal_dtr_enable)
> + return 0;
> +
> + if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
> + nor->write_proto == SNOR_PROTO_8_8_8_DTR))
> + return 0;
> +
> + ret = nor->params->octal_dtr_enable(nor, enable);
> + if (ret)
> + return ret;
> +
> + if (enable)
> + nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
> + else
> + nor->reg_proto = SNOR_PROTO_1_1_1;
> +
> + return 0;
> +}
> +
> /**
> * spi_nor_quad_enable() - enable/disable Quad I/O if needed.
> * @nor: pointer to a 'struct spi_nor'
> @@ -3109,6 +3138,12 @@ static int spi_nor_init(struct spi_nor *nor)
> {
> int err;
>
> + err = spi_nor_octal_dtr_enable(nor, true);
> + if (err) {
> + dev_dbg(nor->dev, "octal mode not supported\n");
> + return err;
> + }
> +
> err = spi_nor_quad_enable(nor, true);
> if (err) {
> dev_dbg(nor->dev, "quad mode not supported\n");
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 42ec7692d8e7..fcb5f071ebed 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -203,6 +203,7 @@ struct spi_nor_locking_ops {
> * higher index in the array, the higher priority.
> * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
> * Table.
> + * @octal_dtr_enable: enables SPI NOR octal DTR mode.
> * @quad_enable: enables/disables SPI NOR Quad mode.
> * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
> * @convert_addr: converts an absolute address into something the flash
> @@ -226,6 +227,7 @@ struct spi_nor_flash_parameter {
>
> struct spi_nor_erase_map erase_map;
>
> + int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
> int (*quad_enable)(struct spi_nor *nor, bool enable);
> int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
> u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
> --
> 2.28.0
>
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next prev parent reply other threads:[~2020-09-30 7:11 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-16 12:44 [PATCH v13 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-09-29 11:30 ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read, write}_reg() helpers Pratyush Yadav
2020-09-29 11:38 ` [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read,write}_reg() helpers Tudor.Ambarus
2020-09-29 12:54 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 03/15] mtd: spi-nor: core: add spi_nor_controller_ops_erase helper Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 04/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 05/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-09-30 6:17 ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 06/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-09-30 6:44 ` Tudor.Ambarus
2020-09-30 6:53 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 07/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-09-30 6:46 ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 08/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-09-30 6:50 ` Tudor.Ambarus
2020-09-30 6:55 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 09/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-09-29 11:26 ` Tudor.Ambarus
2020-09-29 12:51 ` Pratyush Yadav
2020-09-29 13:05 ` Tudor.Ambarus
2020-09-30 7:11 ` Tudor.Ambarus [this message]
2020-09-16 12:44 ` [PATCH v13 10/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-09-30 7:23 ` Tudor.Ambarus
2020-09-30 7:31 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 11/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-09-29 13:08 ` Pratyush Yadav
2020-09-30 7:32 ` Tudor.Ambarus
2020-09-30 7:43 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 12/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-09-30 7:40 ` Tudor.Ambarus
2020-09-30 7:44 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 13/15] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-09-30 7:51 ` Tudor.Ambarus
2020-09-30 8:03 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-09-30 8:36 ` Tudor.Ambarus
2020-09-30 12:32 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-09-30 9:12 ` Tudor.Ambarus
2020-09-29 9:59 ` [RFC PATCH 0/3] mtd: spi-nor: Tackle stateful modes Tudor Ambarus
2020-09-29 9:59 ` [RFC PATCH 1/3] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Tudor Ambarus
2020-09-29 16:45 ` Vignesh Raghavendra
2020-09-29 9:59 ` [RFC PATCH 2/3] mtd: spi-nor: Introduce MTD_SPI_NOR_ALLOW_STATEFUL_MODES Tudor Ambarus
2020-09-29 16:45 ` Vignesh Raghavendra
2020-09-29 9:59 ` [RFC PATCH 3/3] mtd: spi-nor: Parse SFDP SCCR Map Tudor Ambarus
2020-09-30 9:57 ` [PATCH v13 00/15] mtd: spi-nor: add xSPI Octal DTR support Tudor.Ambarus
2020-09-30 12:01 ` Pratyush Yadav
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