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From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Mark Brown <broonie@kernel.org>
Cc: liusimin4@huawei.com, chenxiang66@hisilicon.com,
	John Garry <john.garry@huawei.com>,
	linux-spi <linux-spi@vger.kernel.org>,
	Linuxarm <linuxarm@huawei.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Marek Vasut <marek.vasut@gmail.com>,
	"open list:MEMORY TECHNOLOGY..." <linux-mtd@lists.infradead.org>,
	tudor.ambarus@microchip.com,
	Jiancheng Xue <xuejiancheng@hisilicon.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>,
	fengsheng5@huawei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Mon, 13 Jan 2020 16:17:32 +0200	[thread overview]
Message-ID: <CAHp75VfepiiVFLLmCwdBS0Z6tmR+XKBaOLg1qPPuz1McLjS=4Q@mail.gmail.com> (raw)
In-Reply-To: <20200113140627.GJ3897@sirena.org.uk>

On Mon, Jan 13, 2020 at 4:07 PM Mark Brown <broonie@kernel.org> wrote:
> On Mon, Jan 13, 2020 at 01:01:06PM +0000, John Garry wrote:
> > On 13/01/2020 11:42, Mark Brown wrote:
>
> > > The idiomatic approach appears to be for individual board vendors
> > > to allocate IDs, you do end up with multiple IDs from multiple
> > > vendors for the same thing.
>
> > But I am not sure how appropriate that same approach would be for some 3rd
> > party memory part which we're simply wiring up on our board. Maybe it is.
>
> It seems to be quite common for Intel reference designs to assign
> Intel IDs to non-Intel parts on the board (which is where I
> became aware of this practice).

Basically vendor of component in question is responsible for ID, but
it seems they simple don't care.

-- 
With Best Regards,
Andy Shevchenko

______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2020-01-13 14:17 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2020-01-16 11:03   ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2020-01-09 15:54   ` John Garry
2020-01-09 21:28     ` Mark Brown
2020-01-10 11:55       ` John Garry
2020-01-10 14:07         ` Mark Brown
2020-01-10 14:58           ` John Garry
2020-01-10 15:12             ` Mark Brown
2020-01-10 16:09               ` John Garry
2020-01-10 19:31             ` Andy Shevchenko
2020-01-13 10:09               ` John Garry
2020-01-13 11:42                 ` Mark Brown
2020-01-13 13:01                   ` John Garry
2020-01-13 14:06                     ` Mark Brown
2020-01-13 14:17                       ` Andy Shevchenko [this message]
2020-01-13 14:27                         ` Mark Brown
2020-01-13 14:34                           ` Andy Shevchenko
2020-01-31 10:08                             ` John Garry
2020-01-31 11:39                               ` Andy Shevchenko
2020-01-31 12:03                                 ` John Garry
2020-01-31 15:46                                   ` Andy Shevchenko
2020-01-31 16:26                                     ` John Garry
2020-02-01 11:34                                       ` Mark Brown
2020-02-01 11:32                                     ` Mark Brown
2020-01-10 19:59   ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
2020-01-10 19:59   ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:56   ` Mark Brown

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