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From: Schrempf Frieder <frieder.schrempf@kontron.de>
To: "Heinrich.Toews@wago.com" <Heinrich.Toews@wago.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Cc: "Oleg.Karfich@wago.com" <Oleg.Karfich@wago.com>
Subject: Re: mtd: mchp23k256: How to follow a more generic approach?
Date: Mon, 18 Feb 2019 13:02:01 +0000	[thread overview]
Message-ID: <caa1f926-e50d-a851-8412-6b20c10942ec@kontron.de> (raw)
In-Reply-To: <21e1b97c-0f90-1cf9-cd93-e9785adb1856@wago.com>

Hi Heinrich,

On 18.02.19 13:33, Heinrich.Toews@wago.com wrote:
> Hi altogether,
> 
> I'm using currently the CONFIG_MTD_MCHP23K256 driver to access an
> ANV32AA1W 1Mb Serial SPI nvSRAM from Anvo-Systems Dresden.

We also have a ANV32 nvSRAM chip on some of our boards and so far we 
used misc/eeprom/at25.c to access the memory.
It would be nice to use the chip with the MTD framework too, so it's 
interesting to see, that it's possible with a modified version of 
mchp23k256.c.

> 
> I did some changes to the driver as seen below to make it work.
> 
> 
> diff --git a/drivers/mtd/devices/mchp23k256.c
> b/drivers/mtd/devices/mchp23k256.c
> index 9d8306a..6140973 100644
> --- a/drivers/mtd/devices/mchp23k256.c
> +++ b/drivers/mtd/devices/mchp23k256.c
> @@ -28,6 +28,7 @@ struct mchp23k256_flash {
>    };
> 
>    #define MCHP23K256_CMD_WRITE_STATUS    0x01
> +#define MCHP23K256_CMD_WREN            0x06
>    #define MCHP23K256_CMD_WRITE           0x02
>    #define MCHP23K256_CMD_READ            0x03
>    #define MCHP23K256_MODE_SEQ            BIT(6)
> @@ -40,13 +41,14 @@ static int mchp23k256_write(struct mtd_info *mtd,
> loff_t to, size_t len,
>           struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd);
>           struct spi_transfer transfer[2] = {};
>           struct spi_message message;
> -       unsigned char command[3];
> +       unsigned char command[4];
> 
>           spi_message_init(&message);
> 
>           command[0] = MCHP23K256_CMD_WRITE;
> -       command[1] = to >> 8;
> -       command[2] = to;
> +       command[1] = to >> 16;
> +       command[2] = to >> 8;
> +       command[3] = to;
> 
>           transfer[0].tx_buf = command;
>           transfer[0].len = sizeof(command);
> @@ -73,14 +75,15 @@ static int mchp23k256_read(struct mtd_info *mtd,
> loff_t from, size_t len,
>           struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd);
>           struct spi_transfer transfer[2] = {};
>           struct spi_message message;
> -       unsigned char command[3];
> +       unsigned char command[4];
> 
>           spi_message_init(&message);
> 
>           memset(&transfer, 0, sizeof(transfer));
>           command[0] = MCHP23K256_CMD_READ;
> -       command[1] = from >> 8;
> -       command[2] = from;
> +       command[1] = from >> 16;
> +       command[2] = from >> 8;
> +       command[3] = from;
> 
>           transfer[0].tx_buf = command;
>           transfer[0].len = sizeof(command);
> @@ -104,17 +107,18 @@ static int mchp23k256_read(struct mtd_info *mtd,
> loff_t from, size_t len,
>    /*
>     * Set the device into sequential mode. This allows read/writes to the
>     * entire SRAM in a single operation
> + *
> + * CHANGE: Enable Write Mode in the device
>     */
>    static int mchp23k256_set_mode(struct spi_device *spi)
>    {
>           struct spi_transfer transfer = {};
>           struct spi_message message;
> -       unsigned char command[2];
> +       unsigned char command[1];
> 
>           spi_message_init(&message);
> 
> -       command[0] = MCHP23K256_CMD_WRITE_STATUS;
> -       command[1] = MCHP23K256_MODE_SEQ;
> +       command[0] = MCHP23K256_CMD_WREN;
> 
>           transfer.tx_buf = command;
>           transfer.len = sizeof(command);
> @@ -147,7 +151,7 @@ static int mchp23k256_probe(struct spi_device *spi)
>           flash->mtd.type         = MTD_RAM;
>           flash->mtd.flags        = MTD_CAP_RAM;
>           flash->mtd.writesize    = 1;
> -       flash->mtd.size         = SZ_32K;
> +       flash->mtd.size         = SZ_128K;
>           flash->mtd._read        = mchp23k256_read;
>           flash->mtd._write       = mchp23k256_write;
> 
> 
> What would be the best approach to add a more generic solution to the
> kernel in order to be able to address different SPI SRAM devices?

That's an interesting question. mchp23k256.c registers a RAM device 
(MTD_RAM), but nvSRAM contains RAM and flash and to the outside it acts 
more like flash as data is persistent.
The instructions seem to be very similar to EEPROM and SPI NOR devices.
So I'm curious about what others propose how to support these devices.

Regards,
Frieder
______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2019-02-18 13:02 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-18 12:33 mtd: mchp23k256: How to follow a more generic approach? Heinrich.Toews
2019-02-18 13:02 ` Schrempf Frieder [this message]
2019-02-19  8:15   ` Heinrich.Toews
2019-02-19 14:47     ` Schrempf Frieder
2019-02-20  7:52       ` Boris Brezillon
2019-02-20  8:07         ` Schrempf Frieder

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