Re: MT25Q Advanced Sector Protection support

[<Tudor.Ambarus@microchip.com>]

On 4/15/21 12:44 PM, Stefan Roese wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi Tudor,
> 
> On 15.04.21 11:40, Tudor.Ambarus@microchip.com wrote:
>> On 4/15/21 12:20 PM, Stefan Roese wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> Hi,
>>
>> Hi,
>>
>>>
>>> I'm right now working on a board equipped with an MT25QU128ABA1ESE.
>>> And after doing some intensive QSPI NOR tests, one sector (at 0x40000)
>>> seems to be permanently locked. The normal unlocking does not seem to
>>> help:
>>>
>>> # flash_eraseall -u /dev/mtd0
>>
>> have you tried to unlock it before erasing? You can use flash_unlock.
> 
> IIUTC, the "-u" parameter in eraseall should provide this unlocking as

oh yes, I  missed that.

> well. But hey, I also tried "flash_unlock" without any success. I assume
> that this command unlocks all sectors in the MTD device automatically.

yes, this is what I would expect.

> 
>>> flash_eraseall has been replaced by `flash_erase <mtddev> 0 0`; please
>>> use it
>>> Erasing 64 Kibyte @ 40000 -- 22 % complete libmtd: error!: MEMERASE64
>>> ioctl failed for eraseblock 4 (mtd0)
>>>          error 5 (Input/output error)
>>> flash_erase: error!: /dev/mtd0: MTD Erase failure
>>>               error 5 (Input/output error)
>>> Erasing 64 Kibyte @ 110000 -- 100 % complete
>>>
>>> My best guess right now is that somehow the nonvolatile locking via the
>>> advanced sector protection is active and locking this sector.
>>>
>>> Does anyone have some ideas on how to continue here? Is there some
>>
>> If it's indeed about the individual block protection, you'll have to
>> read the register that describes which registers are locked.
> 
> Yes, I'm digging into it right now. ;)
> 
>>> ongoing work to support the Micron advanced sector protection in Linux?
>>
>> I'm adding support for individual block protection on sst26 flashes,
>> which should be similar.
> 
> Do you by any chance have a WIP version to share, so that I could base
> my work on this?

The sst26 individual block protection is vendor specific, has some read and
write locking features, the individual block protection is discovered by
parsing a vendor specific table, etc. My implementation will reside in sst.c.

You have to check if the Individual Block Protection scheme supported by
micron is used by other vendors as well, and if yes, the code should
reside in swp.c. Similar flash support, but different implementations.
I have 2 patches at:

To https://github.com/ambarus/linux-0day.git
 * [new branch]                spi-nor/next-sst26-locking -> spi-nor/next-sst26-locking

Cheers,
ta
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