From: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
To: "ikegami_to@yahoo.co.jp" <ikegami_to@yahoo.co.jp>,
"psobon@amazon.com" <psobon@amazon.com>,
"boris.brezillon@collabora.com" <boris.brezillon@collabora.com>
Cc: "keescook@chromium.org" <keescook@chromium.org>,
"ikegami@allied-telesis.co.jp" <ikegami@allied-telesis.co.jp>,
"richard@nod.at" <richard@nod.at>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"marek.vasut@gmail.com" <marek.vasut@gmail.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"computersforpeace@gmail.com" <computersforpeace@gmail.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>,
"liujian56@huawei.com" <liujian56@huawei.com>
Subject: Re: Re: [PATCH] cfi: fix deadloop in cfi_cmdset_0002.c do_write_buffer
Date: Fri, 8 Feb 2019 08:45:52 +0000 [thread overview]
Message-ID: <fd352fb2cdfd8f483c419217c7e3153b3265e8d9.camel@infinera.com> (raw)
In-Reply-To: <632ed76bd3844ceab75066d1f30a7115@EX13D07UWA001.ant.amazon.com>
On Thu, 2019-02-07 at 23:50 +0000, Sobon, Przemyslaw wrote:
> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe.
>
>
> Hi Ikegami,
>
> I have seen a case myself where a value was written, chip changed
> state to "ready" but when I was reading the value was incorrect.
> This can happen as result of intermittent issue with flash. It is
> hard to fall into scenario when testing on limited number of devices
> but with large enough population you can see that. Another situation
> is when a flash chip reaches its maximum number of writes. So for
> example a chip is designed for 100k writes to a page. Once you
> reach that number of writes you can have invalid data written to
> flash but chip itself reports everything was good and switches to
> "ready" state.
This makes perfekt sense but the AMD flash control I/F does not. You will
find that trying to do advanced things with "toggle" bits is very hard.
Especially when you also need to scale it to interleaved flashes.
I think the odd delay when flash fails is quite OK. If you want to
fix this you need to move the other control I/F(which mimics what Intel has)
Jocke
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next prev parent reply other threads:[~2019-02-08 8:46 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-31 23:30 [PATCH] cfi: fix deadloop in cfi_cmdset_0002.c do_write_buffer Liu Jian
2019-02-03 8:26 ` Boris Brezillon
2019-02-03 8:35 ` Boris Brezillon
2019-02-05 22:28 ` Sobon, Przemyslaw
2019-02-05 23:03 ` ikegami_to
2019-02-07 8:56 ` Boris Brezillon
2019-02-07 22:59 ` ikegami_to
2019-02-07 23:50 ` Sobon, Przemyslaw
2019-02-08 8:45 ` Joakim Tjernlund [this message]
2019-02-08 14:23 ` Tokunori Ikegami
2019-02-14 1:34 ` liujian (CE)
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