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From: "Javier González" <javier.gonz@samsung.com>
To: Christoph Hellwig <hch@lst.de>
Cc: Keith Busch <kbusch@kernel.org>,
	Dmitry Monakhov <dmtrmonakhov@yandex-team.ru>,
	<linux-kernel@vger.kernel.org>, <linux-nvme@lists.infradead.org>,
	<Chaitanya.Kulkarni@wdc.com>
Subject: Re: [PATCH 1/1] nvme-pci: add the DISABLE_WRITE_ZEROES quirk for a Samsung PM1725a
Date: Tue, 23 Mar 2021 13:43:22 +0100	[thread overview]
Message-ID: <20210323124322.qchyk7boyzklwv3v@mpHalley.local> (raw)
In-Reply-To: <20210323123121.GA31105@lst.de>

On 23.03.2021 13:31, Christoph Hellwig wrote:
>On Tue, Mar 23, 2021 at 09:37:49AM +0100, Javier González wrote:
>> Quick question. It seems like the current quirk simply disables
>> write-zeroes. Would you be open for a quirk that aligns with MDTS for
>> models that implemented it this way before TP4040?
>
>Aligning to MDTS is our current behavior, although all kernels up to
>5.11 had a bug in the calculation.

I see. Let me check internally and see what's going on with
write-zeroes on this model.

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  reply	other threads:[~2021-03-23 12:43 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1615377076-3251-1-git-send-email-dmtrmonakhov@yandex-team.ru>
2021-03-10 13:21 ` [PATCH 1/1] nvme-pci: add the DISABLE_WRITE_ZEROES quirk for a Samsung PM1725a Christoph Hellwig
2021-03-10 13:41   ` Christoph Hellwig
2021-03-10 20:00     ` Keith Busch
2021-03-11 10:47       ` Christoph Hellwig
     [not found]         ` <CGME20210323083750eucas1p14d21230ac758194d854ca336caf7f3f2@eucas1p1.samsung.com>
2021-03-23  8:37           ` Javier González
2021-03-23 12:31             ` Christoph Hellwig
2021-03-23 12:43               ` Javier González [this message]
2021-04-08 10:30                 ` Javier González
2021-04-08 12:15                   ` Christoph Hellwig
2021-04-08 18:15                     ` Javier González
2021-03-11 10:28     ` Dmitry Monakhov

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