From: Stephen Boyd <sboyd@kernel.org>
To: Tero Kristo <t-kristo@ti.com>,
linux-clk@vger.kernel.org, mturquette@baylibre.com
Cc: tony@atomide.com, linux-omap@vger.kernel.org
Subject: Re: [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent
Date: Thu, 14 May 2020 12:55:42 -0700 [thread overview]
Message-ID: <158948614233.215346.7786503812699873424@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20200430083640.8621-4-t-kristo@ti.com>
Quoting Tero Kristo (2020-04-30 01:36:40)
> RNG is sourced from L4 clock. Add info for this for proper parenting of
> the clock.
>
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
Applied to clk-next
prev parent reply other threads:[~2020-05-14 19:55 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 8:36 [PATCH 0/3] clk: ti: dra7xx: clkctrl data fixes Tero Kristo
2020-04-30 8:36 ` [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent Tero Kristo
2020-05-14 19:55 ` Stephen Boyd
2020-04-30 8:36 ` [PATCH 2/3] clk: ti: dra7xx: mark MCAN clock as DRA76x only Tero Kristo
2020-05-14 19:55 ` Stephen Boyd
2020-04-30 8:36 ` [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent Tero Kristo
2020-05-14 19:55 ` Stephen Boyd [this message]
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