From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46614C71156 for ; Tue, 24 Nov 2020 12:46:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0729520857 for ; Tue, 24 Nov 2020 12:46:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="HwHV9IGE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387643AbgKXMqW (ORCPT ); Tue, 24 Nov 2020 07:46:22 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:39530 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732512AbgKXMqV (ORCPT ); Tue, 24 Nov 2020 07:46:21 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AOCkDC4032063; Tue, 24 Nov 2020 06:46:13 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1606221973; bh=8RhXHwnHdy78Kjs8a11cVMBBoPOM1xCa6HMn6omqcOM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HwHV9IGEWKpDWh7d32NDFBZRLLTGHqkHXGGFvEBpLeMBmaJbLhT3cbhcXXyl7Uv80 fS3uRN+7woXxMY/nBY69xssK1DPvRoU3O0tRnpTfTShRD0438VOjb+DHRcMr642Nxx bcrsKzJUkghIrbC+42rNlsf0NOiQn6KwhYtf3FlQ= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AOCkDfr044824 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 24 Nov 2020 06:46:13 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 24 Nov 2020 06:46:13 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 24 Nov 2020 06:46:13 -0600 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AOCjmow040922; Tue, 24 Nov 2020 06:46:11 -0600 From: Tomi Valkeinen To: Sebastian Reichel , Laurent Pinchart , Nikhil Devshatwar , , CC: Sekhar Nori , Tony Lindgren , , Sebastian Reichel , Tomi Valkeinen Subject: [PATCH v4 09/80] drm/omap: dsi: simplify write function Date: Tue, 24 Nov 2020 14:44:27 +0200 Message-ID: <20201124124538.660710-10-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201124124538.660710-1-tomi.valkeinen@ti.com> References: <20201124124538.660710-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Sebastian Reichel Simplify the write related messages handling by using the functionality provided by CONFIG_DRM_MIPI_DSI. Signed-off-by: Sebastian Reichel Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/omapdrm/dss/Kconfig | 1 + drivers/gpu/drm/omapdrm/dss/dsi.c | 146 +++++++--------------------- 2 files changed, 34 insertions(+), 113 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/Kconfig b/drivers/gpu/drm/omapdrm/dss/Kconfig index 2658c521b702..fd7dfa28ce97 100644 --- a/drivers/gpu/drm/omapdrm/dss/Kconfig +++ b/drivers/gpu/drm/omapdrm/dss/Kconfig @@ -95,6 +95,7 @@ config OMAP2_DSS_SDI config OMAP2_DSS_DSI bool "DSI support" default n + select DRM_MIPI_DSI help MIPI DSI (Display Serial Interface) support. diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 796f9c35483e..e1595c0608f2 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -2696,97 +2696,50 @@ static int dsi_vc_send_null(struct dsi_data *dsi, int channel) return dsi_vc_send_long(dsi, channel, MIPI_DSI_NULL_PACKET, NULL, 0, 0); } -static int dsi_vc_write_nosync_common(struct dsi_data *dsi, int channel, - const u8 *data, int len, - enum dss_dsi_content_type type) -{ - int r; - - if (len == 0) { - BUG_ON(type == DSS_DSI_CONTENT_DCS); - r = dsi_vc_send_short(dsi, channel, - MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM, 0, 0); - } else if (len == 1) { - r = dsi_vc_send_short(dsi, channel, - type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM : - MIPI_DSI_DCS_SHORT_WRITE, data[0], 0); - } else if (len == 2) { - r = dsi_vc_send_short(dsi, channel, - type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM : - MIPI_DSI_DCS_SHORT_WRITE_PARAM, - data[0] | (data[1] << 8), 0); - } else { - r = dsi_vc_send_long(dsi, channel, - type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_GENERIC_LONG_WRITE : - MIPI_DSI_DCS_LONG_WRITE, data, len, 0); - } - - return r; -} - -static int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel, - const u8 *data, int len) +static int dsi_vc_write_common(struct omap_dss_device *dssdev, + const struct mipi_dsi_msg *msg) { struct dsi_data *dsi = to_dsi_data(dssdev); + struct mipi_dsi_packet packet; + int r; - return dsi_vc_write_nosync_common(dsi, channel, data, len, - DSS_DSI_CONTENT_DCS); -} + r = mipi_dsi_create_packet(&packet, msg); + if (r < 0) + return r; -static int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel, - const u8 *data, int len) -{ - struct dsi_data *dsi = to_dsi_data(dssdev); + if (mipi_dsi_packet_format_is_short(msg->type)) { + u16 data = packet.header[1] | (packet.header[2] << 8); - return dsi_vc_write_nosync_common(dsi, channel, data, len, - DSS_DSI_CONTENT_GENERIC); -} + r = dsi_vc_send_short(dsi, msg->channel, msg->type, data, 0); + } else { + r = dsi_vc_send_long(dsi, msg->channel, msg->type, + msg->tx_buf, msg->tx_len, 0); + } -static int dsi_vc_write_common(struct omap_dss_device *dssdev, - int channel, const u8 *data, int len, - enum dss_dsi_content_type type) -{ - struct dsi_data *dsi = to_dsi_data(dssdev); - int r; + if (r < 0) + return r; - r = dsi_vc_write_nosync_common(dsi, channel, data, len, type); - if (r) - goto err; + /* + * TODO: we do not always have to do the BTA sync, for example + * we can improve performance by setting the update window + * information without sending BTA sync between the commands. + * In that case we can return early. + */ - r = dsi_vc_send_bta_sync(dssdev, channel); - if (r) - goto err; + r = dsi_vc_send_bta_sync(dssdev, msg->channel); + if (r) { + DSSERR("bta sync failed\n"); + return r; + } /* RX_FIFO_NOT_EMPTY */ - if (REG_GET(dsi, DSI_VC_CTRL(channel), 20, 20)) { + if (REG_GET(dsi, DSI_VC_CTRL(msg->channel), 20, 20)) { DSSERR("rx fifo not empty after write, dumping data:\n"); - dsi_vc_flush_receive_data(dsi, channel); - r = -EIO; - goto err; + dsi_vc_flush_receive_data(dsi, msg->channel); + return -EIO; } return 0; -err: - DSSERR("dsi_vc_write_common(ch %d, cmd 0x%02x, len %d) failed\n", - channel, data[0], len); - return r; -} - -static int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, - const u8 *data, int len) -{ - return dsi_vc_write_common(dssdev, channel, data, len, - DSS_DSI_CONTENT_DCS); -} - -static int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, - const u8 *data, int len) -{ - return dsi_vc_write_common(dssdev, channel, data, len, - DSS_DSI_CONTENT_GENERIC); } static int dsi_vc_dcs_send_read_request(struct dsi_data *dsi, int channel, @@ -3008,15 +2961,6 @@ static int dsi_vc_generic_read(struct omap_dss_device *dssdev, int channel, return 0; } -static int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, - u16 len) -{ - struct dsi_data *dsi = to_dsi_data(dssdev); - - return dsi_vc_send_short(dsi, channel, - MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE, len, 0); -} - static int dsi_enter_ulps(struct dsi_data *dsi) { DECLARE_COMPLETION_ONSTACK(completion); @@ -4817,36 +4761,17 @@ static void dsi_release_vc(struct omap_dss_device *dssdev, int channel) static ssize_t omap_dsi_transfer(struct omap_dss_device *dssdev, const struct mipi_dsi_msg *msg) { - /* - * TODO: no_sync can be used to optimize performance by sending e.g. - * column and page information without syncing in between. It's not - * absolutely required, so postpone this feature for now. - */ - bool no_sync = false; - u16 val; - switch (msg->type) { case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM: case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM: case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM: case MIPI_DSI_GENERIC_LONG_WRITE: - if (no_sync) - return dsi_vc_generic_write_nosync(dssdev, msg->channel, - msg->tx_buf, - msg->tx_len); - else - return dsi_vc_generic_write(dssdev, msg->channel, - msg->tx_buf, msg->tx_len); case MIPI_DSI_DCS_SHORT_WRITE: case MIPI_DSI_DCS_SHORT_WRITE_PARAM: case MIPI_DSI_DCS_LONG_WRITE: - if (no_sync) - return dsi_vc_dcs_write_nosync(dssdev, msg->channel, - msg->tx_buf, - msg->tx_len); - else - return dsi_vc_dcs_write(dssdev, msg->channel, - msg->tx_buf, msg->tx_len); + case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE: + case MIPI_DSI_NULL_PACKET: + return dsi_vc_write_common(dssdev, msg); case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM: case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM: case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM: @@ -4857,11 +4782,6 @@ static ssize_t omap_dsi_transfer(struct omap_dss_device *dssdev, return dsi_vc_dcs_read(dssdev, msg->channel, ((u8 *)msg->tx_buf)[0], msg->rx_buf, msg->rx_len); - case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE: - val = le16_to_cpu(*((__le16 *)msg->tx_buf)); - return dsi_vc_set_max_rx_packet_size(dssdev, msg->channel, val); - case MIPI_DSI_NULL_PACKET: - return dsi_vc_send_null(to_dsi_data(dssdev), msg->channel); } return -EINVAL; -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki