From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CD03C8300C for ; Tue, 24 Nov 2020 12:47:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CC2142076E for ; Tue, 24 Nov 2020 12:47:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="STfs7ZwC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387664AbgKXMqz (ORCPT ); Tue, 24 Nov 2020 07:46:55 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:55122 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387656AbgKXMqz (ORCPT ); Tue, 24 Nov 2020 07:46:55 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AOCkmu5123540; Tue, 24 Nov 2020 06:46:48 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1606222008; bh=vbeJQiIsiv4GZAyjCsomZfcUDBqLl8GhUZip7Sawu4g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=STfs7ZwCKDVoYW6vxERAidDZtywrTlKqy4YHK5lpy0LfjCOR2w7bBRXBTda8F229Z h+jLEzDrNk8nFJBIfalX6v41exLhTDVQl7UGe9W08o/o4AJqBPoJNXTMaIq3MskQAN zCkof3Ud6dTwWZShJ6WU/WEws5t9TMRKnBpCoHGU= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AOCkmet042115 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 24 Nov 2020 06:46:48 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 24 Nov 2020 06:46:48 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 24 Nov 2020 06:46:48 -0600 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AOCjmpC040922; Tue, 24 Nov 2020 06:46:46 -0600 From: Tomi Valkeinen To: Sebastian Reichel , Laurent Pinchart , Nikhil Devshatwar , , CC: Sekhar Nori , Tony Lindgren , , Sebastian Reichel , Tomi Valkeinen Subject: [PATCH v4 23/80] drm/omap: dsi: lp/hs switching support for transfer() Date: Tue, 24 Nov 2020 14:44:41 +0200 Message-ID: <20201124124538.660710-24-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201124124538.660710-1-tomi.valkeinen@ti.com> References: <20201124124538.660710-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Sebastian Reichel Integrate low-power / high-speed bus switching into transfer function and drop the omapdrm specific enable_hs() callback. Signed-off-by: Sebastian Reichel Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 6 +++--- drivers/gpu/drm/omapdrm/dss/dsi.c | 9 +++++++-- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 -- 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c index feb4098ca227..aef5d59181fa 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c @@ -269,7 +269,7 @@ static int dsicm_exit_ulps(struct panel_drv_data *ddata) return 0; src->ops->enable(src); - src->ops->dsi.enable_hs(src, ddata->dsi->channel, true); + ddata->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; r = _dsicm_enable_te(ddata, true); if (r) { @@ -573,7 +573,7 @@ static int dsicm_power_on(struct panel_drv_data *ddata) dsicm_hw_reset(ddata); - src->ops->dsi.enable_hs(src, ddata->dsi->channel, false); + ddata->dsi->mode_flags |= MIPI_DSI_MODE_LPM; r = dsicm_sleep_out(ddata); if (r) @@ -616,7 +616,7 @@ static int dsicm_power_on(struct panel_drv_data *ddata) ddata->intro_printed = true; } - src->ops->dsi.enable_hs(src, ddata->dsi->channel, true); + ddata->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; return 0; err: diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 25122f1eaa4b..352c16a37476 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -329,6 +329,7 @@ struct dsi_data { int irq; bool is_enabled; + bool in_lp_mode; struct clk *dss_clk; struct regmap *syscon; @@ -2431,6 +2432,8 @@ static void dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel, /* start the DDR clock by sending a NULL packet */ if (dsi->vm_timings.ddr_clk_always_on && enable) dsi_vc_send_null(dsi, channel); + + dsi->in_lp_mode = !enable; } static void dsi_vc_flush_long_data(struct dsi_data *dsi, int channel) @@ -4692,6 +4695,10 @@ static ssize_t omap_dsi_host_transfer(struct mipi_dsi_host *host, struct dsi_data *dsi = host_to_omap(host); struct omap_dss_device *dssdev = &dsi->output; + if (!!(msg->flags & MIPI_DSI_MSG_USE_LPM) != dsi->in_lp_mode) + dsi_vc_enable_hs(dssdev, msg->channel, + !(msg->flags & MIPI_DSI_MSG_USE_LPM)); + switch (msg->type) { case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM: case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM: @@ -4752,8 +4759,6 @@ static const struct omap_dss_device_ops dsi_ops = { .disable = dsi_display_disable, - .enable_hs = dsi_vc_enable_hs, - .set_config = dsi_set_config, .enable_video_output = dsi_enable_video_output, diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 9bbd2c0f3187..2d44a8e32fcc 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -288,8 +288,6 @@ struct omapdss_dsi_ops { int (*set_config)(struct omap_dss_device *dssdev, const struct omap_dss_dsi_config *cfg); - void (*enable_hs)(struct omap_dss_device *dssdev, int channel, - bool enable); int (*enable_te)(struct omap_dss_device *dssdev, bool enable); int (*update)(struct omap_dss_device *dssdev, int channel, -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki