From: "David E. Box" <david.e.box@linux.intel.com>
To: Jian-Hong Pan <jhp@endlessos.org>, Bjorn Helgaas <helgaas@kernel.org>
Cc: "Johan Hovold" <johan@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Kuppuswamy Sathyanarayanan"
<sathyanarayanan.kuppuswamy@linux.intel.com>,
"Mika Westerberg" <mika.westerberg@linux.intel.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Nirmal Patel" <nirmal.patel@linux.intel.com>,
"Jonathan Derrick" <jonathan.derrick@linux.dev>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 3/4] PCI/ASPM: Introduce aspm_get_l1ss_cap()
Date: Fri, 26 Apr 2024 16:57:54 -0700 [thread overview]
Message-ID: <09a7091e8731371199686328121335896f71db9a.camel@linux.intel.com> (raw)
In-Reply-To: <20240424110047.21766-2-jhp@endlessos.org>
On Wed, 2024-04-24 at 19:00 +0800, Jian-Hong Pan wrote:
> Introduce aspm_get_l1ss_cap() which is extracted from aspm_l1ss_init() to
> get the PCIe's L1SS capability. This does not change any behavior, but
> aspm_get_l1ss_cap() can be reused later.
>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=218394
> Signed-off-by: Jian-Hong Pan <jhp@endlessos.org>
> ---
> drivers/pci/pcie/aspm.c | 23 ++++++++++++++---------
> 1 file changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
> index 91a8b35b1ae2..c55ac11faa73 100644
> --- a/drivers/pci/pcie/aspm.c
> +++ b/drivers/pci/pcie/aspm.c
> @@ -612,6 +612,18 @@ static void pcie_aspm_check_latency(struct pci_dev
> *endpoint)
> }
> }
>
> +static u32 aspm_get_l1ss_cap(struct pci_dev *pdev)
> +{
> + u32 l1ss_cap;
> +
> + pci_read_config_dword(pdev, pdev->l1ss + PCI_L1SS_CAP, &l1ss_cap);
> +
> + if (!(l1ss_cap & PCI_L1SS_CAP_L1_PM_SS))
> + l1ss_cap = 0;
> +
> + return l1ss_cap;
> +}
> +
> /* Calculate L1.2 PM substate timing parameters */
> static void aspm_calc_l12_info(struct pcie_link_state *link,
> u32 parent_l1ss_cap, u32 child_l1ss_cap)
> @@ -722,15 +734,8 @@ static void aspm_l1ss_init(struct pcie_link_state *link)
> return;
>
> /* Setup L1 substate */
> - pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CAP,
> - &parent_l1ss_cap);
> - pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP,
> - &child_l1ss_cap);
> -
> - if (!(parent_l1ss_cap & PCI_L1SS_CAP_L1_PM_SS))
> - parent_l1ss_cap = 0;
> - if (!(child_l1ss_cap & PCI_L1SS_CAP_L1_PM_SS))
> - child_l1ss_cap = 0;
> + parent_l1ss_cap = aspm_get_l1ss_cap(parent);
> + child_l1ss_cap = aspm_get_l1ss_cap(child);
>
> /*
> * If we don't have LTR for the entire path from the Root Complex
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
prev parent reply other threads:[~2024-04-26 23:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 11:00 [PATCH v5 3/4] PCI/ASPM: Introduce aspm_get_l1ss_cap() Jian-Hong Pan
2024-04-26 23:57 ` David E. Box [this message]
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