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From: Niklas Cassel <niklas.cassel@axis.com>
To: Jingoo Han <jingoohan1@gmail.com>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: Niklas Cassel <niklass@axis.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v6 01/18] PCI: dwc: Use the DMA-API to get the MSI address
Date: Wed, 20 Dec 2017 00:29:22 +0100	[thread overview]
Message-ID: <20171219232940.659-2-niklas.cassel@axis.com> (raw)
In-Reply-To: <20171219232940.659-1-niklas.cassel@axis.com>

Use the DMA-API to get the MSI address. This address will be written to
our PCI config space and to the register which determines which AXI
address the DWC IP will spoof for incoming MSI irqs.

Since it is a PCIe endpoint device, rather than the CPU, that is supposed
to write to the MSI address, the proper way to get the MSI address is by
using the DMA API, not by using virt_to_phys().

Using virt_to_phys() might work on some systems, but using the DMA API
should work on all systems.

This is essentially the same thing as allocating a buffer in a driver
to which the endpoint will write to. To do this, we use the DMA API.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
 drivers/pci/dwc/pcie-designware-host.c | 15 ++++++++++++---
 drivers/pci/dwc/pcie-designware.h      |  3 ++-
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 81e2157a7cfb..bf558df5b7b3 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -83,10 +83,19 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
 
 void dw_pcie_msi_init(struct pcie_port *pp)
 {
+	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+	struct device *dev = pci->dev;
+	struct page *page;
 	u64 msi_target;
 
-	pp->msi_data = __get_free_pages(GFP_KERNEL, 0);
-	msi_target = virt_to_phys((void *)pp->msi_data);
+	page = alloc_page(GFP_KERNEL);
+	pp->msi_data = dma_map_page(dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
+	if (dma_mapping_error(dev, pp->msi_data)) {
+		dev_err(dev, "failed to map MSI data\n");
+		__free_page(page);
+		return;
+	}
+	msi_target = (u64)pp->msi_data;
 
 	/* program the msi_data */
 	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
@@ -187,7 +196,7 @@ static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos)
 	if (pp->ops->get_msi_addr)
 		msi_target = pp->ops->get_msi_addr(pp);
 	else
-		msi_target = virt_to_phys((void *)pp->msi_data);
+		msi_target = (u64)pp->msi_data;
 
 	msg.address_lo = (u32)(msi_target & 0xffffffff);
 	msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff);
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
index e5d9d77b778e..ecdede68522a 100644
--- a/drivers/pci/dwc/pcie-designware.h
+++ b/drivers/pci/dwc/pcie-designware.h
@@ -14,6 +14,7 @@
 #ifndef _PCIE_DESIGNWARE_H
 #define _PCIE_DESIGNWARE_H
 
+#include <linux/dma-mapping.h>
 #include <linux/irq.h>
 #include <linux/msi.h>
 #include <linux/pci.h>
@@ -168,7 +169,7 @@ struct pcie_port {
 	const struct dw_pcie_host_ops *ops;
 	int			msi_irq;
 	struct irq_domain	*irq_domain;
-	unsigned long		msi_data;
+	dma_addr_t		msi_data;
 	DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
 };
 
-- 
2.14.2

  reply	other threads:[~2017-12-19 23:29 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-19 23:29 [PATCH v6 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-12-19 23:29 ` Niklas Cassel [this message]
2017-12-20 19:10   ` [PATCH v6 01/18] PCI: dwc: Use the DMA-API to get the MSI address Joao Pinto
2017-12-21 16:43     ` Jingoo Han
2020-09-23 23:18   ` Rob Herring
2017-12-19 23:29 ` [PATCH v6 02/18] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Niklas Cassel
2017-12-20 19:17   ` Joao Pinto
2017-12-21 16:44     ` Jingoo Han
2017-12-19 23:29 ` [PATCH v6 03/18] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-12-20 19:18   ` Joao Pinto
2017-12-21 16:45     ` Jingoo Han
2017-12-19 23:29 ` [PATCH v6 04/18] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-12-20 19:30   ` Joao Pinto
2017-12-21 16:46     ` Jingoo Han
2017-12-19 23:29 ` [PATCH v6 05/18] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar() Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 06/18] PCI: designware-ep: Add generic function for raising MSI irq Niklas Cassel
2017-12-20 19:32   ` Joao Pinto
2017-12-21 16:47     ` Jingoo Han
2017-12-26 12:50   ` Kishon Vijay Abraham I
2017-12-27 22:29     ` Niklas Cassel
2017-12-28  8:06       ` Kishon Vijay Abraham I
2017-12-28 14:39         ` Kishon Vijay Abraham I
2017-12-28 22:43           ` Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 07/18] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 08/18] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 09/18] PCI: dwc: dra7xx: Help compiler to remove unused code Niklas Cassel
2017-12-20  5:58   ` Kishon Vijay Abraham I
2017-12-19 23:29 ` [PATCH v6 10/18] PCI: dwc: artpec6: Remove unused defines Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 11/18] PCI: dwc: artpec6: Use BIT and GENMASK macros Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 12/18] PCI: dwc: artpec6: Split artpec6_pcie_establish_link() into smaller functions Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 13/18] bindings: PCI: artpec: Add support for endpoint mode Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 14/18] PCI: dwc: artpec6: " Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 15/18] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-12-20  5:52   ` Kishon Vijay Abraham I
2017-12-19 23:29 ` [PATCH v6 16/18] PCI: dwc: artpec6: Deassert the core before waiting for PHY Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 17/18] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 18/18] PCI: dwc: artpec6: " Niklas Cassel
2017-12-20 17:34 ` [PATCH v6 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Lorenzo Pieralisi
2017-12-20 19:47   ` Joao Pinto
2017-12-20 23:22     ` Niklas Cassel
2017-12-21  9:23       ` Joao Pinto
2017-12-21 10:02 ` Lorenzo Pieralisi

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