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Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCHv3 26/27] arm64: dts: freescale: lx2160a: add pcie DT nodes Thread-Topic: [PATCHv3 26/27] arm64: dts: freescale: lx2160a: add pcie DT nodes Thread-Index: AQHUt6oznfGVo6R9S0KQcgPiexQzJg== Date: Tue, 29 Jan 2019 08:11:13 +0000 Message-ID: <20190129080926.36773-27-Zhiqiang.Hou@nxp.com> References: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR04CA0008.apcprd04.prod.outlook.com (2603:1096:203:36::20) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:ad::19) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM6PR04MB6117;6:ukzFZvVvvbGLef9zi1UPu1dffQnOprZCpUhXdxnlDyw+CNTMNk9bDXDrwe4flhV8FUZCD91hzYvET8m3zwn7suPWMVDj0ArqgA00cJ2noJyxpAUJCgoj/ChLl647gWc/JXv4lQrGX41/9wylnn3BrZXT7OLawhCFO3PW4KkpUWvU0ROQprJc9ZL2UTiOxpsssoDYm97I7U62gQ7rBub1rJX0EV9OvHf1uRFqq7t13wE9Xe2lr+zH7PtflRwkUIxh9HpEVdk80XS9EA/R2EaUUlJqhQI9kecTK/BrdNv4cVy0HgJqJ5gvhD6ZiQjfVrdIt/o3/PP0rKQDSv72Ksz3YofVnyA4JqwmzzcdC7Ay9rpGylMXt3Z8Jt6IczuIAvS2JkwBTnkiPHAkHc6h/fWIue1msI3Ir2xWgE8vshoPHPr8EgZ0WuvPcHarlMenOUJI3ILi+mTdjNL90eIbMSOnZA==;5:Gc2Uy7KTmpC7ftIJpyf5QSN3nZoZqs6FIVghcQmS9HUPnbU84qLtWRrUbYsIBpLlhDEZ3xX3l9ytgcpwzKKv6QfJne0vOFsz2ekiCvqv3kUejPmICCj6xqvxi0Gk+IzhjgcK5s4VK0O8jFp1cw+S65FbJRnBzcjRek/P95Nyv12Y5Gv49mqWuGMGRLum+RAndL0bvAF/3wPk0a2jpt0/eg==;7:7J9FRqEv/hR6sQBnmAJLfOyiWh0DY+KNu1AzfStfPI5fb8Euail+dKkaGAEBJN4ndapXsjdvXVLHSDyqrVGYvStgRClrilGaRJDyAIko+Be7s4Po+p+HNiiyNvRjWQB4by9LisDPgDuWVVfgo62BCw== x-ms-office365-filtering-correlation-id: 87e19e5d-5088-4421-cbd9-08d685c15600 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600110)(711020)(4605077)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM6PR04MB6117; x-ms-traffictypediagnostic: AM6PR04MB6117: x-microsoft-antispam-prvs: x-forefront-prvs: 093290AD39 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(396003)(366004)(346002)(376002)(39860400002)(136003)(199004)(189003)(3846002)(6116002)(486006)(81166006)(81156014)(8676002)(7416002)(106356001)(14454004)(478600001)(386003)(446003)(11346002)(186003)(102836004)(476003)(6506007)(8936002)(50226002)(105586002)(68736007)(71190400001)(2906002)(2616005)(71200400001)(36756003)(2501003)(66066001)(97736004)(26005)(4326008)(25786009)(6436002)(6486002)(53936002)(6512007)(256004)(54906003)(7736002)(14444005)(99286004)(305945005)(76176011)(2201001)(110136005)(1076003)(316002)(86362001)(52116002)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:AM6PR04MB6117;H:AM6PR04MB5781.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: slQnXzdSwmTUQU13aN45isFiReZVV3xEIzL0vXAhgT96Ds/i9v5qN5CibTTjhSM5GCZgNnrP35q9X1iBfW40oZ4faPKCJfHOoDJdS5v7ChTJoHBheU/Kkq0BZxx7dKcYMhulozJlDw0BNXfXf20+AQ0HIg2r3SvUTuzCS8HOkrBAwa/8NoRjMExvmRQNwHzP+P/9vJlz6GplVsuVFdMumMMsWg8o5avV+TPYX2drSZ7t1+clJoiwsS+KI5z2XwP+meTa5zVV9efab5l71qepkTGDGlnC1OTrNQpZxTqTD3vHTkazHFwaEwqmNXFN/Fjz/sQPKHn3WecigYHwTtzFlRGHkeihD05hTrmW9nRwEC5WMDzDlbjNBw9DggwxjyBuKYytN+c9EymnzZD0bCzwBu2ZsLSrvBjUyCdGPxCar3c= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 87e19e5d-5088-4421-cbd9-08d685c15600 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Jan 2019 08:11:08.1328 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB6117 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Hou Zhiqiang The LX2160A integrated 6 PCIe Gen4 controllers. Signed-off-by: Hou Zhiqiang Reviewed-by: Minghuan Lian --- V3: - No change .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++++++++++++++++ 1 file changed, 163 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/bo= ot/dts/freescale/fsl-lx2160a.dtsi index 3f6521c47f51..8f687a3ef185 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -882,5 +882,168 @@ }; }; }; + + pcie@3400000 { + compatible =3D "fsl,lx2160a-pcie"; + reg =3D <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x80 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names =3D "csr_axi_slave", "config_axi_slave"; + interrupts =3D , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names =3D "aer", "pme", "intr"; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + dma-coherent; + apio-wins =3D <8>; + ppio-wins =3D <8>; + bus-range =3D <0x0 0xff>; + ranges =3D <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; = /* non-prefetchable memory */ + msi-parent =3D <&its>; + #interrupt-cells =3D <1>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>= , + <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; + + pcie@3500000 { + compatible =3D "fsl,lx2160a-pcie"; + reg =3D <0x00 0x03500000 0x0 0x00100000 /* controller registers */ + 0x88 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names =3D "csr_axi_slave", "config_axi_slave"; + interrupts =3D , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names =3D "aer", "pme", "intr"; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + dma-coherent; + apio-wins =3D <8>; + ppio-wins =3D <8>; + bus-range =3D <0x0 0xff>; + ranges =3D <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; = /* non-prefetchable memory */ + msi-parent =3D <&its>; + #interrupt-cells =3D <1>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>= , + <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; + + pcie@3600000 { + compatible =3D "fsl,lx2160a-pcie"; + reg =3D <0x00 0x03600000 0x0 0x00100000 /* controller registers */ + 0x90 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names =3D "csr_axi_slave", "config_axi_slave"; + interrupts =3D , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names =3D "aer", "pme", "intr"; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + dma-coherent; + apio-wins =3D <256>; + ppio-wins =3D <24>; + bus-range =3D <0x0 0xff>; + ranges =3D <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; = /* non-prefetchable memory */ + msi-parent =3D <&its>; + #interrupt-cells =3D <1>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>= , + <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; + + pcie@3700000 { + compatible =3D "fsl,lx2160a-pcie"; + reg =3D <0x00 0x03700000 0x0 0x00100000 /* controller registers */ + 0x98 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names =3D "csr_axi_slave", "config_axi_slave"; + interrupts =3D , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names =3D "aer", "pme", "intr"; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + dma-coherent; + apio-wins =3D <8>; + ppio-wins =3D <8>; + bus-range =3D <0x0 0xff>; + ranges =3D <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; = /* non-prefetchable memory */ + msi-parent =3D <&its>; + #interrupt-cells =3D <1>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>= , + <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; + + pcie@3800000 { + compatible =3D "fsl,lx2160a-pcie"; + reg =3D <0x00 0x03800000 0x0 0x00100000 /* controller registers */ + 0xa0 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names =3D "csr_axi_slave", "config_axi_slave"; + interrupts =3D , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names =3D "aer", "pme", "intr"; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + dma-coherent; + apio-wins =3D <256>; + ppio-wins =3D <24>; + bus-range =3D <0x0 0xff>; + ranges =3D <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; = /* non-prefetchable memory */ + msi-parent =3D <&its>; + #interrupt-cells =3D <1>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>= , + <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; + + pcie@3900000 { + compatible =3D "fsl,lx2160a-pcie"; + reg =3D <0x00 0x03900000 0x0 0x00100000 /* controller registers */ + 0xa8 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names =3D "csr_axi_slave", "config_axi_slave"; + interrupts =3D , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names =3D "aer", "pme", "intr"; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + dma-coherent; + apio-wins =3D <8>; + ppio-wins =3D <8>; + bus-range =3D <0x0 0xff>; + ranges =3D <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; = /* non-prefetchable memory */ + msi-parent =3D <&its>; + #interrupt-cells =3D <1>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>= , + <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; + }; }; --=20 2.17.1