linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Vidya Sagar <vidyas@nvidia.com>
To: <bhelgaas@google.com>, <robh+dt@kernel.org>,
	<mark.rutland@arm.com>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <kishon@ti.com>,
	<catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<lorenzo.pieralisi@arm.com>, <jingoohan1@gmail.com>,
	<gustavo.pimentel@synopsys.com>
Cc: <mperttunen@nvidia.com>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <vidyas@nvidia.com>,
	<sagar.tv@gmail.com>
Subject: [PATCH V3 13/16] arm64: tegra: Enable PCIe slots in P2972-0000 board
Date: Wed, 17 Apr 2019 00:57:27 +0530	[thread overview]
Message-ID: <20190416192730.15681-14-vidyas@nvidia.com> (raw)
In-Reply-To: <20190416192730.15681-1-vidyas@nvidia.com>

Enable PCIe controller nodes to enable respective PCIe slots on
P2972-0000 board. Following is the ownership of slots by different
PCIe controllers.
Controller-0 : M.2 Key-M slot
Controller-1 : On-board Marvell eSATA controller
Controller-3 : M.2 Key-E slot

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
Changes since [v2]:
* Changed P2U label names to reflect new format that includes 'hsio'/'nvhs'
  strings to reflect UPHY brick they belong to

Changes since [v1]:
* Dropped 'pcie-' from phy-names property strings

 .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi |  2 +-
 .../boot/dts/nvidia/tegra194-p2972-0000.dts   | 41 +++++++++++++++++++
 2 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
index 246c1ebbd055..13263529125b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
@@ -191,7 +191,7 @@
 						regulator-boot-on;
 					};
 
-					sd3 {
+					vdd_1v8ao: sd3 {
 						regulator-name = "VDD_1V8AO";
 						regulator-min-microvolt = <1800000>;
 						regulator-max-microvolt = <1800000>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index b62e96945846..7411c64e24a6 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -169,4 +169,45 @@
 			};
 		};
 	};
+
+	pcie@14180000 {
+		status = "okay";
+
+		vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+		phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
+		       <&p2u_hsio_5>;
+		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
+	};
+
+	pcie@14100000 {
+		status = "okay";
+
+		vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+		phys = <&p2u_hsio_0>;
+		phy-names = "p2u-0";
+	};
+
+	pcie@14140000 {
+		status = "okay";
+
+		vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+		phys = <&p2u_hsio_7>;
+		phy-names = "p2u-0";
+	};
+
+	pcie@141a0000 {
+		status = "disabled";
+
+		vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+		phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
+		       <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
+		       <&p2u_nvhs_6>, <&p2u_nvhs_7>;
+
+		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
+			    "p2u-5", "p2u-6", "p2u-7";
+	};
 };
-- 
2.17.1


  parent reply	other threads:[~2019-04-16 19:29 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-16 19:27 [PATCH V3 00/16] Add Tegra194 PCIe support Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 01/16] PCI: Add #defines for some of PCIe spec r4.0 features Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 02/16] PCI/PME: Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 03/16] PCI: Export pcie_bus_config symbol Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 04/16] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-04-17  9:56   ` Gustavo Pimentel
2019-04-22  7:54     ` Jisheng Zhang
2019-04-23  6:11       ` Vidya Sagar
2019-04-23  9:40       ` Gustavo Pimentel
2019-04-30  0:36       ` [EXT] " Z.q. Hou
2019-04-16 19:27 ` [PATCH V3 05/16] PCI: dwc: Move config space capability search API Vidya Sagar
2019-04-17  9:28   ` Gustavo Pimentel
2019-04-16 19:27 ` [PATCH V3 06/16] PCI: dwc: Add ext " Vidya Sagar
2019-04-17  9:27   ` Gustavo Pimentel
2019-04-17  9:34     ` Vidya Sagar
2019-04-17  9:46       ` Gustavo Pimentel
2019-04-16 19:27 ` [PATCH V3 07/16] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 08/16] PCI: dwc: Add support to enable " Vidya Sagar
2019-04-17  9:39   ` Gustavo Pimentel
2019-04-16 19:27 ` [PATCH V3 09/16] Documentation/devicetree: Add PCIe supports-clkreq property Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 10/16] dt-bindings: PCI: tegra: Add device tree support for T194 Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 11/16] dt-bindings: PHY: P2U: Add Tegra 194 P2U block Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 12/16] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-04-16 19:27 ` Vidya Sagar [this message]
2019-04-16 19:27 ` [PATCH V3 14/16] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 15/16] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-04-16 19:27 ` [PATCH V3 16/16] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190416192730.15681-14-vidyas@nvidia.com \
    --to=vidyas@nvidia.com \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=kishon@ti.com \
    --cc=kthota@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mmaddireddy@nvidia.com \
    --cc=mperttunen@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=sagar.tv@gmail.com \
    --cc=thierry.reding@gmail.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).