From: Bjorn Helgaas <helgaas@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: bjorn@helgaas.com, Vidya Sagar <vidyas@nvidia.com>,
robh+dt@kernel.org, thierry.reding@gmail.com,
jonathanh@nvidia.com, Andrew Murray <andrew.murray@arm.com>,
kishon@ti.com, gustavo.pimentel@synopsys.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
ARM <linux-arm-kernel@lists.infradead.org>,
kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V5 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194
Date: Tue, 31 Mar 2020 10:25:54 -0500 [thread overview]
Message-ID: <20200331152554.GA188434@google.com> (raw)
In-Reply-To: <20200331082325.GA32028@e121166-lin.cambridge.arm.com>
On Tue, Mar 31, 2020 at 09:23:25AM +0100, Lorenzo Pieralisi wrote:
> On Mon, Mar 30, 2020 at 10:00:57PM -0500, Bjorn Helgaas wrote:
> > On Mon, Mar 30, 2020 at 9:55 PM Vidya Sagar <vidyas@nvidia.com> wrote:
> > > On 3/31/2020 3:17 AM, Bjorn Helgaas wrote:
> > > > External email: Use caution opening links or attachments
> > > >
> > > >
> > > > On Tue, Mar 03, 2020 at 11:40:52PM +0530, Vidya Sagar wrote:
> > > >> Add support for the endpoint mode of Synopsys DesignWare core based
> > > >> dual mode PCIe controllers present in Tegra194 SoC.
> > > >>
> > > >> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> > > >> Acked-by: Thierry Reding <treding@nvidia.com>
> > > >> ---
> > > >> V5:
> > > >> * Added Acked-by: Thierry Reding <treding@nvidia.com>
> > > >> * Removed unwanted header file inclusion
> > > >>
> > > >> V4:
> > > >> * Addressed Lorenzo's review comments
> > > >> * Started using threaded irqs instead of kthreads
> > > >>
> > > >> V3:
> > > >> * Addressed Thierry's review comments
> > > >>
> > > >> V2:
> > > >> * Addressed Bjorn's review comments
> > > >> * Made changes as part of addressing review comments for other patches
> > > >>
> > > >> drivers/pci/controller/dwc/Kconfig | 30 +-
> > > >> drivers/pci/controller/dwc/pcie-tegra194.c | 679 ++++++++++++++++++++-
> > > >> 2 files changed, 691 insertions(+), 18 deletions(-)
> > > >>
> > > >> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> > > >> index 0830dfcfa43a..169cde58dd92 100644
> > > >> --- a/drivers/pci/controller/dwc/Kconfig
> > > >> +++ b/drivers/pci/controller/dwc/Kconfig
> > > >> @@ -248,14 +248,38 @@ config PCI_MESON
> > > >> implement the driver.
> > > >>
> > > >> config PCIE_TEGRA194
> > > >> - tristate "NVIDIA Tegra194 (and later) PCIe controller"
> > > >> + tristate
> > > >> +
> > > >> +config PCIE_TEGRA194_HOST
> > > >> + tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
> > > >> depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
> > > >> depends on PCI_MSI_IRQ_DOMAIN
> > > >> select PCIE_DW_HOST
> > > >> select PHY_TEGRA194_P2U
> > > >> + select PCIE_TEGRA194
> > > >> + default y
> > > >
> > > > Sorry I missed this before, but why is this "default y"? From
> > > > Documentation/kbuild/kconfig-language.rst:
> > > >
> > > > The default value deliberately defaults to 'n' in order to avoid
> > > > bloating the build. With few exceptions, new config options should
> > > > not change this. The intent is for "make oldconfig" to add as little
> > > > as possible to the config from release to release.
> > > >
> > > > I do see that several other things in other drivers/pci/ Kconfig files
> > > > are also "default y", and we should probably change some of them. But
> > > > I don't want to add even more unless there's a good reason.
> > > >
> > > > I'm not looking for more reactions like these:
> > > >
> > > > https://lore.kernel.org/r/CAHk-=wiZ24JuVehJ5sEC0UG1Gk2nvB363wO02RRsR1oEht6R9Q@mail.gmail.com
> > > > https://lore.kernel.org/r/CA+55aFzPpuHU1Nqd595SEQS=F+kXMzPs0Rba9FUgTodGxmXsgg@mail.gmail.com
> > > >
> > > > Can you please update this patch to either remove the "default y" or
> > > > add the rationale for keeping it?
> > > I'm fine with removing 'default y' line.
> > > Should I send a patch only with this change?
> >
> > I think it's probably just as easy for Lorenzo to delete that line on
> > his branch. If not, I'll cherry-pick the patches on that branch and
> > do it locally.
>
> Done, pushed out. It is a guideline that it is worth keeping in mind
> while I review the code, sorry for missing it.
Got it, thanks! No worries, easy to fix.
Bjorn
next prev parent reply other threads:[~2020-03-31 15:26 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-03 18:10 [PATCH V5 0/5] Add support for PCIe endpoint mode in Tegra194 Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 1/5] soc/tegra: bpmp: Update ABI header Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 2/5] dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194 Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 3/5] arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194 Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 4/5] arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194 Vidya Sagar
2020-03-22 14:50 ` Guenter Roeck
2020-03-22 17:15 ` Vidya Sagar
2020-03-30 21:47 ` Bjorn Helgaas
2020-03-31 2:55 ` Vidya Sagar
2020-03-31 3:00 ` Bjorn Helgaas
2020-03-31 8:23 ` Lorenzo Pieralisi
2020-03-31 15:25 ` Bjorn Helgaas [this message]
2020-03-11 10:52 ` [PATCH V5 0/5] " Lorenzo Pieralisi
2020-03-11 14:30 ` Thierry Reding
2020-03-11 15:48 ` Vidya Sagar
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