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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org, kishon@ti.com,
	vkoul@kernel.org, robh@kernel.org
Cc: svarbanov@mm-sol.com, bhelgaas@google.com,
	lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	mgautam@codeaurora.org, devicetree@vger.kernel.org,
	truong@codeaurora.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v5 3/5] dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC
Date: Tue, 27 Oct 2020 22:30:31 +0530	[thread overview]
Message-ID: <20201027170033.8475-4-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20201027170033.8475-1-manivannan.sadhasivam@linaro.org>

Document the PCIe DT bindings for SM8250 SoC. The PCIe IP is similar to
the one used on SDM845, hence just add the compatible along with the
optional "atu" register region.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/pci/qcom,pcie.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
index 02bc81bb8b2d..3b55310390a0 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
@@ -13,6 +13,7 @@
 			- "qcom,pcie-ipq8074" for ipq8074
 			- "qcom,pcie-qcs404" for qcs404
 			- "qcom,pcie-sdm845" for sdm845
+			- "qcom,pcie-sm8250" for sm8250
 
 - reg:
 	Usage: required
@@ -27,6 +28,7 @@
 			- "dbi"	   DesignWare PCIe registers
 			- "elbi"   External local bus interface registers
 			- "config" PCIe configuration space
+			- "atu"    ATU address space (optional)
 
 - device_type:
 	Usage: required
@@ -131,7 +133,7 @@
 			- "slave_bus"	AXI Slave clock
 
 -clock-names:
-	Usage: required for sdm845
+	Usage: required for sdm845 and sm8250
 	Value type: <stringlist>
 	Definition: Should contain the following entries
 			- "aux"		Auxiliary clock
@@ -206,7 +208,7 @@
 			- "ahb"			AHB reset
 
 - reset-names:
-	Usage: required for sdm845
+	Usage: required for sdm845 and sm8250
 	Value type: <stringlist>
 	Definition: Should contain the following entries
 			- "pci"			PCIe core reset
-- 
2.17.1


  parent reply	other threads:[~2020-10-27 17:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-27 17:00 [PATCH v5 0/5] Add PCIe support for SM8250 SoC Manivannan Sadhasivam
2020-10-27 17:00 ` [PATCH v5 1/5] dt-bindings: phy: qcom,qmp: Add SM8250 PCIe PHY bindings Manivannan Sadhasivam
2020-11-16  5:58   ` Vinod Koul
2020-10-27 17:00 ` [PATCH v5 2/5] phy: qcom-qmp: Add SM8250 PCIe QMP PHYs Manivannan Sadhasivam
2020-11-16  5:58   ` Vinod Koul
2020-10-27 17:00 ` Manivannan Sadhasivam [this message]
2020-11-22  4:10   ` [PATCH v5 3/5] dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC Bjorn Andersson
2020-10-27 17:00 ` [PATCH v5 4/5] PCI: qcom: Add SM8250 SoC support Manivannan Sadhasivam
2020-11-22  4:12   ` Bjorn Andersson
2020-10-27 17:00 ` [PATCH v5 5/5] PCI: qcom: Add support for configuring BDF to SID mapping for SM8250 Manivannan Sadhasivam
2020-11-22  4:18   ` Bjorn Andersson
2020-12-08  9:47 ` [PATCH v5 0/5] Add PCIe support for SM8250 SoC Lorenzo Pieralisi
2020-12-08 10:45   ` Manivannan Sadhasivam
2020-12-08 11:40     ` Lorenzo Pieralisi
2020-12-08 12:01       ` Manivannan Sadhasivam

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