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From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	broonie@kernel.org, bcm-kernel-feedback-list@broadcom.com,
	james.quinlan@broadcom.com
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM
	BCM2711/BCM2835 ARM ARCHITECTURE),
	linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
	BCM2711/BCM2835 ARM ARCHITECTURE),
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v2 2/6] PCI: brcmstb: Add control of EP voltage regulator(s)
Date: Mon, 30 Nov 2020 16:11:39 -0500	[thread overview]
Message-ID: <20201130211145.3012-3-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20201130211145.3012-1-james.quinlan@broadcom.com>

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Control of EP regulators by the RC is needed because of the chicken-and-egg
situation: although the regulator is "owned" by the EP and would be best
handled on its driver, the EP cannot be discovered and probed unless its
regulator is already turned on.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
 drivers/pci/controller/pcie-brcmstb.c | 38 ++++++++++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index bea86899bd5d..9d4ac42b3bee 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -23,6 +23,7 @@
 #include <linux/of_platform.h>
 #include <linux/pci.h>
 #include <linux/printk.h>
+#include <linux/regulator/consumer.h>
 #include <linux/reset.h>
 #include <linux/sizes.h>
 #include <linux/slab.h>
@@ -210,6 +211,10 @@ enum pcie_type {
 	BCM2711,
 };
 
+static const char * const ep_regulator_names[] = {
+	"vpcie12v", "vpcie3v3", "vpcie1v8", "vpcie0v9",
+};
+
 struct pcie_cfg_data {
 	const int *offsets;
 	const enum pcie_type type;
@@ -287,8 +292,25 @@ struct brcm_pcie {
 	u32			hw_rev;
 	void			(*perst_set)(struct brcm_pcie *pcie, u32 val);
 	void			(*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
+	struct regulator_bulk_data supplies[ARRAY_SIZE(ep_regulator_names)];
 };
 
+static void brcm_set_regulators(struct brcm_pcie *pcie, bool on)
+{
+	struct device *dev = pcie->dev;
+	int ret;
+
+	if (on)
+		ret = regulator_bulk_enable(ARRAY_SIZE(ep_regulator_names),
+					    pcie->supplies);
+	else
+		ret = regulator_bulk_disable(ARRAY_SIZE(ep_regulator_names),
+					     pcie->supplies);
+	if (ret)
+		dev_err(dev, "failed to %s EP regulators\n",
+			on ? "enable" : "disable");
+}
+
 /*
  * This is to convert the size of the inbound "BAR" region to the
  * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE
@@ -1139,6 +1161,7 @@ static int brcm_pcie_suspend(struct device *dev)
 	brcm_pcie_turn_off(pcie);
 	ret = brcm_phy_stop(pcie);
 	clk_disable_unprepare(pcie->clk);
+	brcm_set_regulators(pcie, false);
 
 	return ret;
 }
@@ -1151,6 +1174,7 @@ static int brcm_pcie_resume(struct device *dev)
 	int ret;
 
 	base = pcie->base;
+	brcm_set_regulators(pcie, true);
 	clk_prepare_enable(pcie->clk);
 
 	ret = brcm_phy_start(pcie);
@@ -1189,6 +1213,7 @@ static void __brcm_pcie_remove(struct brcm_pcie *pcie)
 	brcm_phy_stop(pcie);
 	reset_control_assert(pcie->rescal);
 	clk_disable_unprepare(pcie->clk);
+	brcm_set_regulators(pcie, false);
 }
 
 static int brcm_pcie_remove(struct platform_device *pdev)
@@ -1218,7 +1243,7 @@ static int brcm_pcie_probe(struct platform_device *pdev)
 	struct pci_host_bridge *bridge;
 	const struct pcie_cfg_data *data;
 	struct brcm_pcie *pcie;
-	int ret;
+	int ret, i;
 
 	bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie));
 	if (!bridge)
@@ -1246,6 +1271,16 @@ static int brcm_pcie_probe(struct platform_device *pdev)
 	if (IS_ERR(pcie->clk))
 		return PTR_ERR(pcie->clk);
 
+	for (i = 0; i < ARRAY_SIZE(ep_regulator_names); i++)
+		pcie->supplies[i].supply = ep_regulator_names[i];
+
+	ret = devm_regulator_bulk_get(pcie->dev, ARRAY_SIZE(ep_regulator_names),
+				      pcie->supplies);
+	if (ret) {
+		dev_err(pcie->dev, "failed to get regulators\n");
+		return ret;
+	}
+
 	ret = of_pci_get_max_link_speed(np);
 	pcie->gen = (ret < 0) ? 0 : ret;
 
@@ -1273,6 +1308,7 @@ static int brcm_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	brcm_set_regulators(pcie, true);
 	ret = brcm_pcie_setup(pcie);
 	if (ret)
 		goto fail;
-- 
2.17.1


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  parent reply	other threads:[~2020-11-30 21:13 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-30 21:11 [PATCH v2 0/6] brcmstb: add EP regulators and panic handler Jim Quinlan
2020-11-30 21:11 ` [PATCH v2 1/6] dt-bindings: PCI: Add bindings for Brcmstb EP voltage regulators Jim Quinlan
2020-12-09 14:01   ` Rob Herring
2021-01-04 22:12     ` Jim Quinlan
2021-01-05 14:01       ` Mark Brown
2021-01-05 15:09         ` Jim Quinlan
2021-01-05 15:33           ` Mark Brown
2021-01-07 22:31       ` Rob Herring
2020-11-30 21:11 ` Jim Quinlan [this message]
2020-11-30 21:32   ` [PATCH v2 2/6] PCI: brcmstb: Add control of EP voltage regulator(s) Florian Fainelli
2020-11-30 21:11 ` [PATCH v2 3/6] PCI: brcmstb: Do not turn off regulators if EP can wake up Jim Quinlan
2020-11-30 21:29   ` Florian Fainelli
2020-11-30 21:11 ` [PATCH v2 4/6] PCI: brcmstb: Give 7216 SOCs their own config type Jim Quinlan
2020-11-30 21:24   ` Florian Fainelli
2020-11-30 21:11 ` [PATCH v2 5/6] PCI: brcmstb: Add panic/die handler to RC driver Jim Quinlan
2020-11-30 21:28   ` Florian Fainelli
2020-12-01 18:05   ` Bjorn Helgaas
2020-12-01 20:12     ` Jim Quinlan
2021-01-06 19:19   ` Bjorn Helgaas
     [not found]     ` <CA+-6iNzARUT63Mv7qFzk_g5wep4v6aPuN8f8yjQcgozVcKhVTw@mail.gmail.com>
2021-01-06 19:57       ` Jim Quinlan
2021-01-06 23:11         ` Bjorn Helgaas
2020-11-30 21:11 ` [PATCH v2 6/6] PCI: brcmstb: check return value of clk_prepare_enable() Jim Quinlan
2020-11-30 21:24   ` Florian Fainelli
2021-01-06 19:19 ` [PATCH v2 0/6] brcmstb: add EP regulators and panic handler Bjorn Helgaas

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