From: Kishon Vijay Abraham I <kishon@ti.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Jonathan Corbet <corbet@lwn.net>,
Kishon Vijay Abraham I <kishon@ti.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>, Jon Mason <jdmason@kudzu.us>,
Dave Jiang <dave.jiang@intel.com>,
Allen Hubbe <allenbh@gmail.com>, Tom Joseph <tjoseph@cadence.com>,
Rob Herring <robh@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<linux-pci@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-ntb@googlegroups.com>
Subject: [PATCH v9 11/17] PCI: cadence: Implement ->msi_map_irq() ops
Date: Mon, 4 Jan 2021 20:59:03 +0530 [thread overview]
Message-ID: <20210104152909.22038-12-kishon@ti.com> (raw)
In-Reply-To: <20210104152909.22038-1-kishon@ti.com>
Implement ->msi_map_irq() ops in order to map physical address to
MSI address and return MSI data.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../pci/controller/cadence/pcie-cadence-ep.c | 53 +++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c
index 9e2b024d32f2..dc88078194cb 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-ep.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c
@@ -382,6 +382,57 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn,
return 0;
}
+static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn,
+ phys_addr_t addr, u8 interrupt_num,
+ u32 entry_size, u32 *msi_data,
+ u32 *msi_addr_offset)
+{
+ struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
+ u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;
+ struct cdns_pcie *pcie = &ep->pcie;
+ u64 pci_addr, pci_addr_mask = 0xff;
+ u16 flags, mme, data, data_mask;
+ u8 msi_count;
+ int ret;
+ int i;
+
+ /* Check whether the MSI feature has been enabled by the PCI host. */
+ flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS);
+ if (!(flags & PCI_MSI_FLAGS_ENABLE))
+ return -EINVAL;
+
+ /* Get the number of enabled MSIs */
+ mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;
+ msi_count = 1 << mme;
+ if (!interrupt_num || interrupt_num > msi_count)
+ return -EINVAL;
+
+ /* Compute the data value to be written. */
+ data_mask = msi_count - 1;
+ data = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_DATA_64);
+ data = data & ~data_mask;
+
+ /* Get the PCI address where to write the data into. */
+ pci_addr = cdns_pcie_ep_fn_readl(pcie, fn, cap + PCI_MSI_ADDRESS_HI);
+ pci_addr <<= 32;
+ pci_addr |= cdns_pcie_ep_fn_readl(pcie, fn, cap + PCI_MSI_ADDRESS_LO);
+ pci_addr &= GENMASK_ULL(63, 2);
+
+ for (i = 0; i < interrupt_num; i++) {
+ ret = cdns_pcie_ep_map_addr(epc, fn, addr,
+ pci_addr & ~pci_addr_mask,
+ entry_size);
+ if (ret)
+ return ret;
+ addr = addr + entry_size;
+ }
+
+ *msi_data = data;
+ *msi_addr_offset = pci_addr & pci_addr_mask;
+
+ return 0;
+}
+
static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn,
u16 interrupt_num)
{
@@ -481,6 +532,7 @@ static const struct pci_epc_features cdns_pcie_epc_features = {
.linkup_notifier = false,
.msi_capable = true,
.msix_capable = true,
+ .align = 256,
};
static const struct pci_epc_features*
@@ -500,6 +552,7 @@ static const struct pci_epc_ops cdns_pcie_epc_ops = {
.set_msix = cdns_pcie_ep_set_msix,
.get_msix = cdns_pcie_ep_get_msix,
.raise_irq = cdns_pcie_ep_raise_irq,
+ .map_msi_irq = cdns_pcie_ep_map_msi_irq,
.start = cdns_pcie_ep_start,
.get_features = cdns_pcie_ep_get_features,
};
--
2.17.1
next prev parent reply other threads:[~2021-01-04 15:31 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-04 15:28 [PATCH v9 00/17] Implement NTB Controller using multiple PCI EP Kishon Vijay Abraham I
2021-01-04 15:28 ` [PATCH v9 01/17] Documentation: PCI: Add specification for the *PCI NTB* function device Kishon Vijay Abraham I
2021-01-19 18:34 ` Bjorn Helgaas
2021-01-22 14:18 ` Kishon Vijay Abraham I
2021-01-28 12:11 ` Lorenzo Pieralisi
2021-01-28 13:34 ` Kishon Vijay Abraham I
2021-01-29 1:05 ` Randy Dunlap
2021-01-29 5:10 ` Kishon Vijay Abraham I
2021-01-04 15:28 ` [PATCH v9 02/17] PCI: endpoint: Make *_get_first_free_bar() take into account 64 bit BAR Kishon Vijay Abraham I
2021-01-04 15:28 ` [PATCH v9 03/17] PCI: endpoint: Add helper API to get the 'next' unreserved BAR Kishon Vijay Abraham I
2021-01-04 15:28 ` [PATCH v9 04/17] PCI: endpoint: Make *_free_bar() to return error codes on failure Kishon Vijay Abraham I
2021-01-04 15:28 ` [PATCH v9 05/17] PCI: endpoint: Remove unused pci_epf_match_device() Kishon Vijay Abraham I
2021-01-04 15:28 ` [PATCH v9 06/17] PCI: endpoint: Add support to associate secondary EPC with EPF Kishon Vijay Abraham I
2021-01-04 15:28 ` [PATCH v9 07/17] PCI: endpoint: Add support in configfs to associate two EPCs " Kishon Vijay Abraham I
2021-01-04 15:29 ` [PATCH v9 08/17] PCI: endpoint: Add pci_epc_ops to map MSI irq Kishon Vijay Abraham I
2021-01-04 15:29 ` [PATCH v9 09/17] PCI: endpoint: Add pci_epf_ops for epf drivers to expose function specific attrs Kishon Vijay Abraham I
2021-01-04 15:29 ` [PATCH v9 10/17] PCI: endpoint: Allow user to create sub-directory of 'EPF Device' directory Kishon Vijay Abraham I
2021-01-19 18:34 ` Bjorn Helgaas
2021-01-19 18:35 ` Bjorn Helgaas
2021-01-19 18:38 ` Greg Kroah-Hartman
2021-01-04 15:29 ` Kishon Vijay Abraham I [this message]
2021-01-04 15:29 ` [PATCH v9 12/17] PCI: cadence: Configure LM_EP_FUNC_CFG based on epc->function_num_map Kishon Vijay Abraham I
2021-01-04 15:29 ` [PATCH v9 13/17] PCI: endpoint: Add EP function driver to provide NTB functionality Kishon Vijay Abraham I
2021-01-19 19:04 ` Bjorn Helgaas
2021-01-04 15:29 ` [PATCH v9 14/17] PCI: Add TI J721E device to pci ids Kishon Vijay Abraham I
2021-01-04 15:29 ` [PATCH v9 15/17] NTB: Add support for EPF PCI-Express Non-Transparent Bridge Kishon Vijay Abraham I
2021-01-18 17:12 ` Dave Jiang
2021-01-04 15:29 ` [PATCH v9 16/17] Documentation: PCI: Add configfs binding documentation for pci-ntb endpoint function Kishon Vijay Abraham I
2021-01-04 15:29 ` [PATCH v9 17/17] Documentation: PCI: Add userguide for PCI endpoint NTB function Kishon Vijay Abraham I
2021-01-19 18:34 ` Bjorn Helgaas
2021-01-22 14:08 ` Kishon Vijay Abraham I
2021-01-04 15:46 ` [PATCH v9 00/17] Implement NTB Controller using multiple PCI EP Kishon Vijay Abraham I
2021-01-18 5:14 ` Kishon Vijay Abraham I
2021-01-19 11:29 ` Lorenzo Pieralisi
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