From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A990C433E0 for ; Thu, 11 Mar 2021 19:17:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B6D0B64F0C for ; Thu, 11 Mar 2021 19:17:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229944AbhCKTQf (ORCPT ); Thu, 11 Mar 2021 14:16:35 -0500 Received: from mail.kernel.org ([198.145.29.99]:41646 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229520AbhCKTQH (ORCPT ); Thu, 11 Mar 2021 14:16:07 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id E9FC164EF2; Thu, 11 Mar 2021 19:16:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1615490165; bh=nKWwGiGO6+FXiSkDFk2w1sq4arv1V6JlzszSg8Y7QMk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=QCTE5HITElA7vkXUnbkkVn25zFyNucD5HJhhQSQBkXcg70gMTjEECxGHBXChGk79g Lm3gzOD8AsvbZ5OMcOgcOED9ANxr2HB18+o11euDlZ9yHps5RflUgDPbD7ZC+3djP1 jJxh/ojDT0tXtzdUK0j5tXQ2K4g24gkCN1+ftlMctQg8R/bFRTPCOdK5P+c+/yjcBf UxjoKlGGsp32pXrnTS8W4Je9VbF/S5mFvfDf9pUjuW0W6gRnZrpscoGD8bpcA256MK HFqluwZME3NoLOHpQ/+2aM/qE3CDUZMNuMQFbpAVYJ40ikBbQiagHQa5NW2zB+FqgN +jzD2jkB1MvBQ== Date: Thu, 11 Mar 2021 12:16:02 -0700 From: Keith Busch To: Bjorn Helgaas Cc: Alexander Duyck , Leon Romanovsky , Bjorn Helgaas , Saeed Mahameed , Leon Romanovsky , Jason Gunthorpe , Jakub Kicinski , linux-pci , linux-rdma@vger.kernel.org, Netdev , Don Dutile , Alex Williamson , "David S . Miller" , Greg Kroah-Hartman Subject: Re: [PATCH mlx5-next v7 0/4] Dynamically assign MSI-X vectors count Message-ID: <20210311191602.GA36893@C02WT3WMHTD6> References: <20210311181729.GA2148230@bjorn-Precision-5520> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210311181729.GA2148230@bjorn-Precision-5520> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Thu, Mar 11, 2021 at 12:17:29PM -0600, Bjorn Helgaas wrote: > On Wed, Mar 10, 2021 at 03:34:01PM -0800, Alexander Duyck wrote: > > > > I'm not so much worried about management software as the fact that > > this is a vendor specific implementation detail that is shaping how > > the kernel interfaces are meant to work. Other than the mlx5 I don't > > know if there are any other vendors really onboard with this sort of > > solution. > > I know this is currently vendor-specific, but I thought the value > proposition of dynamic configuration of VFs for different clients > sounded compelling enough that other vendors would do something > similar. But I'm not an SR-IOV guy and have no vendor insight, so > maybe that's not the case? NVMe has a similar feature defined by the standard where a PF controller can dynamically assign MSIx vectors to VFs. The whole thing is managed in user space with an ioctl, though. I guess we could wire up the driver to handle it through this sysfs interface too, but I think the protocol specific tooling is more appropriate for nvme.