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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2022 05:23:59.9041 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 814fe4ef-8ad1-42e5-264d-08d9fe685aa0 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT0057.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR02MB7355 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The PCIe device driver which attaches to management function on Alveo devices. The first version of this driver demonstrates calling PCIe interface to create device tree node. Signed-off-by: Sonal Santan Signed-off-by: Max Zhen Signed-off-by: Lizhi Hou --- drivers/fpga/Kconfig | 3 ++ drivers/fpga/Makefile | 3 ++ drivers/fpga/xrt/Kconfig | 24 ++++++++++++ drivers/fpga/xrt/Makefile | 8 ++++ drivers/fpga/xrt/mgmt/Makefile | 12 ++++++ drivers/fpga/xrt/mgmt/xmgmt-drv.c | 63 +++++++++++++++++++++++++++++++ 6 files changed, 113 insertions(+) create mode 100644 drivers/fpga/xrt/Kconfig create mode 100644 drivers/fpga/xrt/Makefile create mode 100644 drivers/fpga/xrt/mgmt/Makefile create mode 100644 drivers/fpga/xrt/mgmt/xmgmt-drv.c diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 991b3f361ec9..93ae387c97c5 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -243,4 +243,7 @@ config FPGA_MGR_VERSAL_FPGA configure the programmable logic(PL). To compile this as a module, choose M here. + +source "drivers/fpga/xrt/Kconfig" + endif # FPGA diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 0bff783d1b61..81ea43c40c64 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -49,3 +49,6 @@ obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o # Drivers for FPGAs which implement DFL obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o + +# XRT drivers for Xilinx Alveo platforms +obj-$(CONFIG_FPGA_XRT) += xrt/ diff --git a/drivers/fpga/xrt/Kconfig b/drivers/fpga/xrt/Kconfig new file mode 100644 index 000000000000..47efc8f71cec --- /dev/null +++ b/drivers/fpga/xrt/Kconfig @@ -0,0 +1,24 @@ + +# XRT Alveo FPGA device configuration +# + +config FPGA_XRT + tristate "XRT Alveo Drivers" + depends on OF + select OF_EMPTY_ROOT + select OF_OVERLAY + help + Select this option to enable Xilinx XRT Alveo drivers. Xilinx Alveo + card is PCIe device and has two PCIe functions. The first function + performs board manangement and XRT management driver will be attached + to it. The second function performs data movement, compute unit + scheduling etc. And an XRT user driver will be attached to it. + +config FPGA_XRT_XMGMT + tristate "Xilinx Alveo Management Driver" + depends on FPGA_XRT + help + Select this option to enable XRT PCIe driver for Xilinx Alveo FPGA. + This driver provides interfaces for userspace application to access + Alveo FPGA device, such as: downloading FPGA bitstream, query card + information, hot reset card etc. diff --git a/drivers/fpga/xrt/Makefile b/drivers/fpga/xrt/Makefile new file mode 100644 index 000000000000..2d251b5653bb --- /dev/null +++ b/drivers/fpga/xrt/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2020-2022 Xilinx, Inc. All rights reserved. +# +# Authors: Lizhi.Hou@xilinx.com +# + +obj-$(CONFIG_FPGA_XRT_XMGMT) += mgmt/ diff --git a/drivers/fpga/xrt/mgmt/Makefile b/drivers/fpga/xrt/mgmt/Makefile new file mode 100644 index 000000000000..b893c7293d70 --- /dev/null +++ b/drivers/fpga/xrt/mgmt/Makefile @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2020-2022 Xilinx, Inc. All rights reserved. +# +# Authors: Sonal.Santan@xilinx.com +# Lizhi.Hou@xilinx.com +# + +obj-$(CONFIG_FPGA_XRT_XMGMT) += xrt-mgmt.o + +xrt-mgmt-objs := \ + xmgmt-drv.o diff --git a/drivers/fpga/xrt/mgmt/xmgmt-drv.c b/drivers/fpga/xrt/mgmt/xmgmt-drv.c new file mode 100644 index 000000000000..60742a478a43 --- /dev/null +++ b/drivers/fpga/xrt/mgmt/xmgmt-drv.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Alveo Management Function Driver + * + * Copyright (C) 2020-2022 Xilinx, Inc. + * + * Authors: + * Cheng Zhen + * Lizhi Hou + */ + +#include +#include +#include +#include +#include +#include + +#define XMGMT_MODULE_NAME "xrt-mgmt" + +/* PCI Device IDs */ +#define PCI_DEVICE_ID_U50 0x5020 +static const struct pci_device_id xmgmt_pci_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_U50), }, /* Alveo U50 */ + { 0, } +}; + +static int xmgmt_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + devm_of_pci_create_bus_endpoint(pdev); + + return 0; +} + +static struct pci_driver xmgmt_driver = { + .name = XMGMT_MODULE_NAME, + .id_table = xmgmt_pci_ids, + .probe = xmgmt_probe, +}; + +static int __init xmgmt_init(void) +{ + int res; + + res = pci_register_driver(&xmgmt_driver); + if (res) + return res; + + return 0; +} + +static __exit void xmgmt_exit(void) +{ + pci_unregister_driver(&xmgmt_driver); +} + +module_init(xmgmt_init); +module_exit(xmgmt_exit); + +MODULE_DEVICE_TABLE(pci, xmgmt_pci_ids); +MODULE_AUTHOR("XRT Team "); +MODULE_DESCRIPTION("Xilinx Alveo management function driver"); +MODULE_LICENSE("GPL v2"); -- 2.27.0