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([2001:470:dd84:abc0::8a5]) by smtp.gmail.com with ESMTPSA id h12-20020a19700c000000b00477baba9504sm22360lfc.40.2022.05.18.11.26.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 May 2022 11:26:21 -0700 (PDT) Message-ID: <783bbf39-779d-3ac8-a965-9d98ec1993ec@linaro.org> Date: Wed, 18 May 2022 21:26:16 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v6 3/5] clk: qcom: gcc-sm8450: use new clk_regmap_pipe_src_ops for PCIe pipe clocks Content-Language: en-GB To: Stephen Boyd , Andy Gross , Bjorn Andersson , Bjorn Helgaas , Johan Hovold , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Lorenzo Pieralisi , Manivannan Sadhasivam , Michael Turquette , Rob Herring , Stanimir Varbanov Cc: Prasad Malisetty , Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-clk@vger.kernel.org References: <20220513175339.2981959-1-dmitry.baryshkov@linaro.org> <20220513175339.2981959-4-dmitry.baryshkov@linaro.org> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 18/05/2022 20:59, Stephen Boyd wrote: > Quoting Dmitry Baryshkov (2022-05-13 10:53:37) >> diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c >> index 593a195467ff..a140a89b73b4 100644 >> --- a/drivers/clk/qcom/gcc-sm8450.c >> +++ b/drivers/clk/qcom/gcc-sm8450.c >> @@ -239,17 +218,21 @@ static const struct clk_parent_data gcc_parent_data_11[] = { >> { .fw_name = "bi_tcxo" }, >> }; >> >> -static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = { >> +static struct clk_regmap_phy_mux gcc_pcie_0_pipe_clk_src = { >> .reg = 0x7b060, >> .shift = 0, >> .width = 2, >> - .parent_map = gcc_parent_map_4, >> + .phy_src_val = 0, /* pipe_clk */ > > Make a define? PCIE0_PIPE_CLK_SRC_VAL and drop the comment? This value can change between the muxes. Thus I'd prefer not to do this. Compare it with the parent_maps, where we do not use defines for the 'val' part. > >> + .ref_src_val = 2, /* bi_tcxo */ >> .clkr = { >> .hw.init = &(struct clk_init_data){ >> .name = "gcc_pcie_0_pipe_clk_src", >> - .parent_data = gcc_parent_data_4, >> - .num_parents = ARRAY_SIZE(gcc_parent_data_4), >> - .ops = &clk_regmap_mux_closest_ops, >> + .parent_data = &(const struct clk_parent_data){ >> + .fw_name = "pcie_0_pipe_clk", >> + }, >> + .num_parents = 1, >> + .flags = CLK_SET_RATE_PARENT, >> + .ops = &clk_regmap_phy_mux_ops, >> }, >> }, >> }; -- With best wishes Dmitry