From: Vidya Sagar <vidyas@nvidia.com>
To: <bhelgaas@google.com>, <hkallweit1@gmail.com>,
<wangxiongfeng2@huawei.com>, <mika.westerberg@linux.intel.com>,
<kai.heng.feng@canonical.com>,
<chris.packham@alliedtelesis.co.nz>, <yangyicong@hisilicon.com>,
<lorenzo.pieralisi@arm.com>, <treding@nvidia.com>,
<jonathanh@nvidia.com>
Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
<sagar.tv@gmail.com>
Subject: Re: [PATCH] PCI/ASPM: Save/restore ASPM-L1SS controls for suspend/resume
Date: Wed, 4 Nov 2020 12:34:56 +0530 [thread overview]
Message-ID: <86571610-b6ce-0f20-5a9f-99d6c427333a@nvidia.com> (raw)
In-Reply-To: <20201024190442.871-1-vidyas@nvidia.com>
Bjorn / Lorenzo,
Could you please review this change?
Thanks,
Vidya Sagar
On 10/25/2020 12:34 AM, Vidya Sagar wrote:
> Previously ASPM L1-Sub-States control registers (CTL1 and CTL2) weren't
> saved and restored during suspend/resume leading to ASPM-L1SS
> configuration being lost post resume.
>
> Save the ASPM-L1SS control registers so that the configuration is retained
> post resume.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> v1:
> * It would be really good if someone can verify it on a non tegra194 platform
>
> drivers/pci/pci.c | 7 +++++++
> drivers/pci/pci.h | 4 ++++
> drivers/pci/pcie/aspm.c | 41 +++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 52 insertions(+)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index a458c46d7e39..034497264bde 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -1551,6 +1551,7 @@ int pci_save_state(struct pci_dev *dev)
> return i;
>
> pci_save_ltr_state(dev);
> + pci_save_aspm_l1ss_state(dev);
> pci_save_dpc_state(dev);
> pci_save_aer_state(dev);
> return pci_save_vc_state(dev);
> @@ -1656,6 +1657,7 @@ void pci_restore_state(struct pci_dev *dev)
> * LTR itself (in the PCIe capability).
> */
> pci_restore_ltr_state(dev);
> + pci_restore_aspm_l1ss_state(dev);
>
> pci_restore_pcie_state(dev);
> pci_restore_pasid_state(dev);
> @@ -3319,6 +3321,11 @@ void pci_allocate_cap_save_buffers(struct pci_dev *dev)
> if (error)
> pci_err(dev, "unable to allocate suspend buffer for LTR\n");
>
> + error = pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_L1SS,
> + 2 * sizeof(u32));
> + if (error)
> + pci_err(dev, "unable to allocate suspend buffer for ASPM-L1SS\n");
> +
> pci_allocate_vc_save_buffers(dev);
> }
>
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index fa12f7cbc1a0..8d2135f61e36 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -565,11 +565,15 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev);
> void pcie_aspm_exit_link_state(struct pci_dev *pdev);
> void pcie_aspm_pm_state_change(struct pci_dev *pdev);
> void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
> +void pci_save_aspm_l1ss_state(struct pci_dev *dev);
> +void pci_restore_aspm_l1ss_state(struct pci_dev *dev);
> #else
> static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { }
> static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { }
> static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev) { }
> static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }
> +static inline void pci_save_aspm_l1ss_state(struct pci_dev *dev) { }
> +static inline void pci_restore_aspm_l1ss_state(struct pci_dev *dev) { }
> #endif
>
> #ifdef CONFIG_PCIE_ECRC
> diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
> index 253c30cc1967..d965bbc563ed 100644
> --- a/drivers/pci/pcie/aspm.c
> +++ b/drivers/pci/pcie/aspm.c
> @@ -742,6 +742,47 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)
> PCI_L1SS_CTL1_L1SS_MASK, val);
> }
>
> +void pci_save_aspm_l1ss_state(struct pci_dev *dev)
> +{
> + struct pci_cap_saved_state *save_state;
> + int aspm_l1ss;
> + u32 *cap;
> +
> + if (!pci_is_pcie(dev))
> + return;
> +
> + aspm_l1ss = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_L1SS);
> + if (!aspm_l1ss)
> + return;
> +
> + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS);
> + if (!save_state)
> + return;
> +
> + cap = (u32 *)&save_state->cap.data[0];
> + pci_read_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL1, cap++);
> + pci_read_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL2, cap++);
> +}
> +
> +void pci_restore_aspm_l1ss_state(struct pci_dev *dev)
> +{
> + struct pci_cap_saved_state *save_state;
> + int aspm_l1ss;
> + u32 *cap;
> +
> + if (!pci_is_pcie(dev))
> + return;
> +
> + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS);
> + aspm_l1ss = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_L1SS);
> + if (!save_state || !aspm_l1ss)
> + return;
> +
> + cap = (u32 *)&save_state->cap.data[0];
> + pci_write_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL1, *cap++);
> + pci_write_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL2, *cap++);
> +}
> +
> static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
> {
> pcie_capability_clear_and_set_word(pdev, PCI_EXP_LNKCTL,
>
next prev parent reply other threads:[~2020-11-04 7:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-24 19:04 [PATCH] PCI/ASPM: Save/restore ASPM-L1SS controls for suspend/resume Vidya Sagar
2020-11-04 7:04 ` Vidya Sagar [this message]
2020-11-13 22:23 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=86571610-b6ce-0f20-5a9f-99d6c427333a@nvidia.com \
--to=vidyas@nvidia.com \
--cc=bhelgaas@google.com \
--cc=chris.packham@alliedtelesis.co.nz \
--cc=hkallweit1@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=kai.heng.feng@canonical.com \
--cc=kthota@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mika.westerberg@linux.intel.com \
--cc=mmaddireddy@nvidia.com \
--cc=sagar.tv@gmail.com \
--cc=treding@nvidia.com \
--cc=wangxiongfeng2@huawei.com \
--cc=yangyicong@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).