Hello again,

The complete lspci outputs follow in attachments.

In the working case, region 5, is at e0200000 with size 256k and is
immediately followed by the expansion rom at  e0240000 [disabled]
[size=128K], however in the non-working case,
region 5 has a completely different address, and regions are not contiguous.
Another difference is at:
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
        Address: 00000000f1020a04  Data: 0f12

vs

    Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
        Address: 0000000000000000  Data: 0000

So it looks like MSI is not being enabled with the new PCI management
code and looks like the PCI rom maybe mapped to an invalid memory
address, causing the ioremap to fail.

Regards,
Luís Mendes, Researcher, Instituto Superior Técnico
Hardware and Software engineer
https://tecnico.ulisboa.pt/en/

On Tue, Dec 18, 2018 at 8:37 PM Thomas Petazzoni
<thomas.petazzoni@bootlin.com> wrote:
>
> Hello,
>
> On Tue, 18 Dec 2018 15:42:34 +0000, Luís Mendes wrote:
>
> > Thanks a lot for your quick reply and patch, but unfortunately the
> > problem remains the same with the patch applied.
>
> Gaah, too bad. A shot in the dark sometimes works, sometimes not.
>
> > How can I help to further pin down the issue?
>
> Could you post the output of:
>
> lspci -vvv -xxx
>
> with the "PCI: mvebu: Convert to PCI emulated bridge config space"
> patch applied and reverted, and send the result ? This would allow me
> to look at the differences in the configuration space exposed by the
> emulated bridge and hopefully see which one might cause the regression.
>
> Thanks,
>
> Thomas
> --
> Thomas Petazzoni, CTO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com