From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: "Chuan Hua, Lei" <chuanhua.lei@linux.intel.com>,
eswara.kota@linux.intel.com, andriy.shevchenko@intel.com,
cheol.yong.kim@intel.com, devicetree@vger.kernel.org,
gustavo.pimentel@synopsys.com, hch@infradead.org,
jingoohan1@gmail.com, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, qi-ming.wu@intel.com
Subject: Re: [PATCH v2 3/3] dwc: PCI: intel: Intel PCIe RC controller driver
Date: Thu, 29 Aug 2019 23:01:22 +0200 [thread overview]
Message-ID: <CAFBinCCdje3Q3=adk+gUkcxHfwvAuoB8sQERbDsyt6Q58fgcOg@mail.gmail.com> (raw)
In-Reply-To: <023c9b59-70bb-ed8d-a4c0-76eae726b574@ti.com>
Hi Kishon,
On Thu, Aug 29, 2019 at 7:10 AM Kishon Vijay Abraham I <kishon@ti.com> wrote:
[...]
> The PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION defines the Power
> Sequencing and Reset Signal Timings in Table 2-4. Please also refer Figure
> 2-10: Power Up of the CEM.
>
> ╔═════════════╤══════════════════════════════════════╤═════╤═════╤═══════╗
> ║ Symbol │ Parameter │ Min │ Max │ Units ║
> ╠═════════════╪══════════════════════════════════════╪═════╪═════╪═══════╣
> ║ T PVPERL │ Power stable to PERST# inactive │ 100 │ │ ms ║
> ╟─────────────┼──────────────────────────────────────┼─────┼─────┼───────╢
> ║ T PERST-CLK │ REFCLK stable before PERST# inactive │ 100 │ │ μs ║
> ╟─────────────┼──────────────────────────────────────┼─────┼─────┼───────╢
> ║ T PERST │ PERST# active time │ 100 │ │ μs ║
> ╟─────────────┼──────────────────────────────────────┼─────┼─────┼───────╢
> ║ T FAIL │ Power level invalid to PERST# active │ │ 500 │ ns ║
> ╟─────────────┼──────────────────────────────────────┼─────┼─────┼───────╢
> ║ T WKRF │ WAKE# rise – fall time │ │ 100 │ ns ║
> ╚═════════════╧══════════════════════════════════════╧═════╧═════╧═══════╝
>
> In my code I used T PERST-CLK (i.e REFCLK stable before PERST# inactive).
> REFCLK to the card is enabled as part of PHY enable and then wait for 100μs
> before making PERST# inactive.
>
> Power to the device is given during board power up and the assumption here is
> it will take more the 100ms for the probe to be invoked after board power up
> (i.e after ROM, bootloaders and linux kernel). But if you have a regulator that
> is enabled in PCI probe, then T PVPERL (100ms) should also used in probe.
thank you for this detailed overview and for the explanation about the
assumptions you made (and why)
Martin
next prev parent reply other threads:[~2019-08-29 21:01 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-20 9:39 [PATCH v2 0/3] PCI: Add map irq callback in dwc framework and add Intel PCIe driver Dilip Kota
2019-08-20 9:39 ` [PATCH v2 1/3] PCI: dwc: Add map irq callback Dilip Kota
2019-08-20 9:39 ` [PATCH v2 2/3] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller Dilip Kota
2019-08-20 13:42 ` Rob Herring
2019-08-21 9:56 ` Dilip Kota
2019-08-20 9:39 ` [PATCH v2 3/3] dwc: PCI: intel: Intel PCIe RC controller driver Dilip Kota
2019-08-24 21:03 ` Martin Blumenstingl
2019-08-26 3:30 ` Chuan Hua, Lei
2019-08-26 6:48 ` Dilip Kota
[not found] ` <f1cb5ba9-b57a-971a-5a2f-1f13e0cc9507@linux.intel.com>
2019-08-26 20:14 ` Martin Blumenstingl
2019-08-27 9:14 ` Dilip Kota
2019-08-26 21:15 ` Martin Blumenstingl
2019-08-27 3:09 ` Chuan Hua, Lei
2019-08-27 8:47 ` Dilip Kota
2019-08-27 20:51 ` Martin Blumenstingl
2019-08-27 20:38 ` Martin Blumenstingl
2019-08-28 3:35 ` Chuan Hua, Lei
2019-08-28 19:36 ` Martin Blumenstingl
2019-08-29 2:54 ` Chuan Hua, Lei
[not found] ` <4bab775a-0e39-a187-0791-40050feb7d67@linux.intel.com>
2019-09-03 18:36 ` Martin Blumenstingl
2019-08-29 5:10 ` Kishon Vijay Abraham I
2019-08-29 21:01 ` Martin Blumenstingl [this message]
2019-08-27 14:28 ` Andy Shevchenko
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