From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79FC1C4361B for ; Mon, 7 Dec 2020 14:19:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3A1B6235F9 for ; Mon, 7 Dec 2020 14:19:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726234AbgLGOTU (ORCPT ); Mon, 7 Dec 2020 09:19:20 -0500 Received: from mail.kernel.org ([198.145.29.99]:35730 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726083AbgLGOTU (ORCPT ); Mon, 7 Dec 2020 09:19:20 -0500 X-Gm-Message-State: AOAM532e5Y6b2iQ6kBDjl11eLsmVzu3bZvrJcCOA4vOyt9tUbqNTUHad umTReymNClnZuipK70v90+NnsqEQw/z12/MJSw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1607350719; bh=gTcXCqe9yeMZ7fk8VbczfWXHPVBJu/7UXTRjQLLfZ+E=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=rRROwRlucuDdEDVIT3M7ZDymxB0qhxanMq7E7caQm4v0JqqI1/SMK1P5v4Tm5NFhZ nBYGGfNv7yGgIXiX3aAYZhSc3J7p7HRvu+lsBZ+qu+wqhuKZLuz5BsssKw2X8fdWG8 lpdM9MSCroxERHoa2ohkYmByxDMpGf8av7d8AM1iCy73RDyvNXW2OLbRIUm7FhisbI emjYf7XFzDqswd+guteTaumHglDgixMUE6+DQP2tIj9msYUkSSV4nrhRBKWYJn5fhG Vu64H+rZBzWC9ajIp9vGyT633YXo+EI1HDbG+mFqV2thbWXOS9Pxpa1QP+dTH5Hj+2 5cSfe1UBaZWtg== X-Google-Smtp-Source: ABdhPJxgXeDWtSrD1bCwnK7FP7jLX7IY7SA8mS0iZBOfUkOEAUdIXARrcV+Jbi6lq099OrASiaaS5cey+ePtzNEnAbw= X-Received: by 2002:a17:906:2806:: with SMTP id r6mr17815664ejc.130.1607350718180; Mon, 07 Dec 2020 06:18:38 -0800 (PST) MIME-Version: 1.0 References: <20201109192611.16104-1-vidyas@nvidia.com> In-Reply-To: <20201109192611.16104-1-vidyas@nvidia.com> From: Rob Herring Date: Mon, 7 Dec 2020 08:18:26 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] PCI: dwc: Add support to configure for ECRC To: Vidya Sagar Cc: Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Bjorn Helgaas , Andrew Murray , Thierry Reding , Jon Hunter , PCI , "linux-kernel@vger.kernel.org" , kthota@nvidia.com, Manikanta Maddireddy , sagar.tv@gmail.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Mon, Nov 9, 2020 at 1:26 PM Vidya Sagar wrote: > > DesignWare core has a TLP digest (TD) override bit in one of the control > registers of ATU. This bit also needs to be programmed for proper ECRC > functionality. This is currently identified as an issue with DesignWare > IP version 4.90a. > > Signed-off-by: Vidya Sagar > --- > drivers/pci/controller/dwc/pcie-designware.c | 50 ++++++++++++++++++-- > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 2 files changed, 47 insertions(+), 4 deletions(-) Reviewed-by: Rob Herring