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From: Athani Nadeem Ladkhan <nadeem@cadence.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Tom Joseph <tjoseph@cadence.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	PCI <linux-pci@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Milind Parab <mparab@cadence.com>,
	Swapnil Kashinath Jakhade <sjakhade@cadence.com>,
	Parshuram Raju Thombare <pthombar@cadence.com>
Subject: RE: [PATCH 1/2] dt-bindings:pci: Set LTSSM Detect.Quiet state delay.
Date: Sun, 14 Mar 2021 18:56:53 +0000	[thread overview]
Message-ID: <CO2PR07MB25034C1F1ACD54CDC3D465B6D86D9@CO2PR07MB2503.namprd07.prod.outlook.com> (raw)
In-Reply-To: <CAL_JsqJf1JHNEygoSPOqFocXL4F4M7p-MB-UxOp=D--NKnvTZw@mail.gmail.com>

Hi Rob,

> -----Original Message-----
> From: Rob Herring <robh+dt@kernel.org>
> Sent: Tuesday, March 9, 2021 10:17 PM
> To: Athani Nadeem Ladkhan <nadeem@cadence.com>
> Cc: Tom Joseph <tjoseph@cadence.com>; Bjorn Helgaas
> <bhelgaas@google.com>; PCI <linux-pci@vger.kernel.org>;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com>; Kishon Vijay Abraham I <kishon@ti.com>;
> Milind Parab <mparab@cadence.com>; Swapnil Kashinath Jakhade
> <sjakhade@cadence.com>; Parshuram Raju Thombare
> <pthombar@cadence.com>
> Subject: Re: [PATCH 1/2] dt-bindings:pci: Set LTSSM Detect.Quiet state delay.
> 
> EXTERNAL MAIL
> 
> 
> On Tue, Mar 9, 2021 at 12:31 AM Nadeem Athani <nadeem@cadence.com>
> wrote:
> >
> > The parameter detect-quiet-min-delay can be used to program the
> > minimum time that LTSSM waits on entering Detect.Quiet state.
> > 00 : 0us minimum wait time in Detect.Quiet state.
> > 01 : 100us minimum wait time in Detect.Quiet state.
> > 10 : 1000us minimum wait time in Detect.Quiet state.
> > 11 : 2000us minimum wait time in Detect.Quiet state.
> 
> What determines this setting? Is it per board or SoC? Is this a standard PCI
> timing thing? Why does this need to be tuned per platform?
The pcie spec. says this delay to be between 0 to 1ms.
The default 0 value works in most cases.
However it has been found that some SOC may require this delay to be greater than 0.
This has been proved by an internal simulation experiments.
Hence providing this feature in device tree for required SOC's.
> 
> > Signed-off-by: Nadeem Athani <nadeem@cadence.com>
> > ---
> >  .../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml        | 13
> +++++++++++++
> >  1 file changed, 13 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
> > b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
> > index 293b8ec318bc..a1d56e0be419 100644
> > --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
> > +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
> > @@ -27,6 +27,18 @@ properties:
> >
> >    msi-parent: true
> >
> > +  detect-quiet-min-delay:
> > +    description:
> > +      LTSSM Detect.Quiet state minimum delay.
> > +      00 : 0us minimum wait time
> > +      01 : 100us minimum wait time
> > +      10 : 1000us minimum wait time
> > +      11 : 2000us minimum wait time
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    minimum: 0
> > +    maximum: 3
> > +    default: 0
> > +
> >  required:
> >    - reg
> >    - reg-names
> > @@ -48,6 +60,7 @@ examples:
> >              linux,pci-domain = <0>;
> >              vendor-id = <0x17cd>;
> >              device-id = <0x0200>;
> > +            detect-quiet-min-delay = <0>;
> >
> >              reg = <0x0 0xfb000000  0x0 0x01000000>,
> >                    <0x0 0x41000000  0x0 0x00001000>;
> > --
> > 2.15.0
> >

  reply	other threads:[~2021-03-14 18:57 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-09  7:31 [PATCH 0/2] PCI: cadence: Set LTSSM Detect.Quiet state delay Nadeem Athani
2021-03-09  7:31 ` [PATCH 1/2] dt-bindings:pci: " Nadeem Athani
2021-03-09 16:46   ` Rob Herring
2021-03-14 18:56     ` Athani Nadeem Ladkhan [this message]
2021-03-09 17:19   ` Rob Herring
2021-03-09  7:31 ` [PATCH 2/2] PCI: cadence: " Nadeem Athani
2021-03-15 13:11   ` Kishon Vijay Abraham I

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