RE: [PATCH 1/7] PCI: dwc: Fix a bug of the case dw_pci->ops is NULL

["Z.q. Hou" <zhiqiang.hou@nxp.com>]

Hi Gustavo,

Thanks a lot for your review and ack!

Regards,
Zhiqiang

> -----Original Message-----
> From: Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>
> Sent: 2020年9月9日 17:29
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; linux-pci@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> bhelgaas@google.com; robh+dt@kernel.org; shawnguo@kernel.org; Leo Li
> <leoyang.li@nxp.com>; lorenzo.pieralisi@arm.com
> Cc: M.h. Lian <minghuan.lian@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>
> Subject: RE: [PATCH 1/7] PCI: dwc: Fix a bug of the case dw_pci->ops is NULL
> 
> Hi Hou,
> 
> On Mon, Sep 7, 2020 at 6:37:55, Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
> wrote:
> 
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The dw_pci->ops may be a NULL, and fix it by adding one more check.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> >  drivers/pci/controller/dwc/pcie-designware.c | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.c
> > b/drivers/pci/controller/dwc/pcie-designware.c
> > index b723e0cc41fb..bdf8938da9cd 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware.c
> > @@ -140,7 +140,7 @@ u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32
> reg, size_t size)
> >  	int ret;
> >  	u32 val;
> >
> > -	if (pci->ops->read_dbi)
> > +	if (pci->ops && pci->ops->read_dbi)
> >  		return pci->ops->read_dbi(pci, pci->dbi_base, reg, size);
> >
> >  	ret = dw_pcie_read(pci->dbi_base + reg, size, &val); @@ -155,7
> > +155,7 @@ void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t
> > size, u32 val)  {
> >  	int ret;
> >
> > -	if (pci->ops->write_dbi) {
> > +	if (pci->ops && pci->ops->write_dbi) {
> >  		pci->ops->write_dbi(pci, pci->dbi_base, reg, size, val);
> >  		return;
> >  	}
> > @@ -200,7 +200,7 @@ u32 dw_pcie_read_atu(struct dw_pcie *pci, u32
> reg, size_t size)
> >  	int ret;
> >  	u32 val;
> >
> > -	if (pci->ops->read_dbi)
> > +	if (pci->ops && pci->ops->read_dbi)
> >  		return pci->ops->read_dbi(pci, pci->atu_base, reg, size);
> >
> >  	ret = dw_pcie_read(pci->atu_base + reg, size, &val); @@ -214,7
> > +214,7 @@ void dw_pcie_write_atu(struct dw_pcie *pci, u32 reg, size_t
> > size, u32 val)  {
> >  	int ret;
> >
> > -	if (pci->ops->write_dbi) {
> > +	if (pci->ops && pci->ops->write_dbi) {
> >  		pci->ops->write_dbi(pci, pci->atu_base, reg, size, val);
> >  		return;
> >  	}
> > @@ -283,7 +283,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie
> > *pci, int index, int type,  {
> >  	u32 retries, val;
> >
> > -	if (pci->ops->cpu_addr_fixup)
> > +	if (pci->ops && pci->ops->cpu_addr_fixup)
> >  		cpu_addr = pci->ops->cpu_addr_fixup(pci, cpu_addr);
> >
> >  	if (pci->iatu_unroll_enabled) {
> > @@ -470,7 +470,7 @@ int dw_pcie_link_up(struct dw_pcie *pci)  {
> >  	u32 val;
> >
> > -	if (pci->ops->link_up)
> > +	if (pci->ops && pci->ops->link_up)
> >  		return pci->ops->link_up(pci);
> >
> >  	val = readl(pci->dbi_base + PCIE_PORT_DEBUG1);
> > --
> > 2.17.1
> 
> Looks good to me.
> 
> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> 
> 
>