From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23783C43381 for ; Thu, 11 Mar 2021 19:22:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D6B7C64F1E for ; Thu, 11 Mar 2021 19:22:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230131AbhCKTV2 (ORCPT ); Thu, 11 Mar 2021 14:21:28 -0500 Received: from mail.kernel.org ([198.145.29.99]:43022 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230056AbhCKTVH (ORCPT ); Thu, 11 Mar 2021 14:21:07 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 56F0664F0E; Thu, 11 Mar 2021 19:21:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1615490467; bh=4nzdDaCG0kYjgpTNhrTOt1hQovgTcOIbi5H3Z+VRkI8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=YiE8RtarNRjbac5gWsUs8tC1hxmqyPXEsGdi014Tz6Qk4A7/GIiFJMtB7LoQj8qXH GOJHORMbzzbCmbsJiXhpanDBKpgBV09gg+sFL4yiVkeVnPJzfrqt2bJ1FeEhXXsa7O o3KB880AXXf7ZeGLVoEpr+xSf1d+29YWSmAmfy32nbWkWz3jgqy2JKv9GAvSCQCtqu LQXrrO5wxI99Uat7MRLpXaQEMcWWj4/xD6x0nEzl3NUMmPex/gC5CdIwrQuZYJqeU0 gbErfPdBYvnsNnu8CCjI8hTCM4tAXqa78wFhCkRKn9jn6P1bC2/64zv6Hlp8ThYVWg nu+a9NT9kIxsg== Date: Thu, 11 Mar 2021 21:21:03 +0200 From: Leon Romanovsky To: Keith Busch Cc: Bjorn Helgaas , Alexander Duyck , Bjorn Helgaas , Saeed Mahameed , Jason Gunthorpe , Jakub Kicinski , linux-pci , linux-rdma@vger.kernel.org, Netdev , Don Dutile , Alex Williamson , "David S . Miller" , Greg Kroah-Hartman Subject: Re: [PATCH mlx5-next v7 0/4] Dynamically assign MSI-X vectors count Message-ID: References: <20210311181729.GA2148230@bjorn-Precision-5520> <20210311191602.GA36893@C02WT3WMHTD6> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210311191602.GA36893@C02WT3WMHTD6> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Thu, Mar 11, 2021 at 12:16:02PM -0700, Keith Busch wrote: > On Thu, Mar 11, 2021 at 12:17:29PM -0600, Bjorn Helgaas wrote: > > On Wed, Mar 10, 2021 at 03:34:01PM -0800, Alexander Duyck wrote: > > > > > > I'm not so much worried about management software as the fact that > > > this is a vendor specific implementation detail that is shaping how > > > the kernel interfaces are meant to work. Other than the mlx5 I don't > > > know if there are any other vendors really onboard with this sort of > > > solution. > > > > I know this is currently vendor-specific, but I thought the value > > proposition of dynamic configuration of VFs for different clients > > sounded compelling enough that other vendors would do something > > similar. But I'm not an SR-IOV guy and have no vendor insight, so > > maybe that's not the case? > > NVMe has a similar feature defined by the standard where a PF controller can > dynamically assign MSIx vectors to VFs. The whole thing is managed in user > space with an ioctl, though. I guess we could wire up the driver to handle it > through this sysfs interface too, but I think the protocol specific tooling is > more appropriate for nvme. We need this MSI-X thing for IB and ethernet devices too. This is why PCI sysfs is the best place to put it, so all SR-IOV flavours will have sane way to configure it. Thanks