From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Peter Rosin <peda@axentia.se>,
Swapnil Jakhade <sjakhade@cadence.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 5/9] phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup
Date: Mon, 22 Feb 2021 16:53:10 +0530 [thread overview]
Message-ID: <20210222112314.10772-6-kishon@ti.com> (raw)
In-Reply-To: <20210222112314.10772-1-kishon@ti.com>
commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module
present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in
wiz. However during cleanup, it removed only the MUX clock provider.
Remove the DIVIDER clock provider here.
Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/ti/phy-j721e-wiz.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 956a93d96d9b..1a4e09a394a8 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -608,6 +608,12 @@ static void wiz_clock_cleanup(struct wiz *wiz, struct device_node *node)
of_clk_del_provider(clk_node);
of_node_put(clk_node);
}
+
+ for (i = 0; i < wiz->clk_div_sel_num; i++) {
+ clk_node = of_get_child_by_name(node, clk_div_sel[i].node_name);
+ of_clk_del_provider(clk_node);
+ of_node_put(clk_node);
+ }
}
static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
--
2.17.1
--
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next prev parent reply other threads:[~2021-02-23 3:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-22 11:23 [PATCH v2 0/9] AM64: Add SERDES bindings and driver support Kishon Vijay Abraham I
2021-02-22 11:23 ` [PATCH v2 1/9] dt-bindings: phy: ti, phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper Kishon Vijay Abraham I
2021-03-04 4:45 ` [PATCH v2 1/9] dt-bindings: phy: ti,phy-j721e-wiz: " Kishon Vijay Abraham I
2021-03-08 17:50 ` Rob Herring
2021-02-22 11:23 ` [PATCH v2 2/9] dt-bindings: phy: cadence-torrent: Add binding for refclk driver Kishon Vijay Abraham I
2021-03-08 17:51 ` Rob Herring
2021-02-22 11:23 ` [PATCH v2 3/9] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC Kishon Vijay Abraham I
2021-03-08 17:52 ` Rob Herring
2021-02-22 11:23 ` [PATCH v2 4/9] phy: ti: j721e-wiz: Remove "regmap_field" from wiz_clk_{mux|div}_sel Kishon Vijay Abraham I
2021-02-22 11:23 ` Kishon Vijay Abraham I [this message]
2021-02-22 11:23 ` [PATCH v2 6/9] phy: ti: j721e-wiz: Configure full rate divider for AM64 Kishon Vijay Abraham I
2021-02-22 11:23 ` [PATCH v2 7/9] phy: ti: j721e-wiz: Model the internal clocks without device tree input Kishon Vijay Abraham I
2021-02-22 11:23 ` [PATCH v2 8/9] phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m> Kishon Vijay Abraham I
2021-02-22 11:23 ` [PATCH v2 9/9] phy: cadence-torrent: Add support to drive refclk out Kishon Vijay Abraham I
2021-02-22 19:45 ` kernel test robot
2021-03-09 14:21 ` Swapnil Kashinath Jakhade
2021-03-10 10:24 ` Kishon Vijay Abraham I
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