From: Lukasz Luba <l.luba@partner.samsung.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org,
"linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
linux-clk@vger.kernel.org, mturquette@baylibre.com,
sboyd@kernel.org,
"Bartłomiej Żołnierkiewicz" <b.zolnierkie@samsung.com>,
kgene@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
"Chanwoo Choi" <cw00.choi@samsung.com>,
kyungmin.park@samsung.com,
"Marek Szyprowski" <m.szyprowski@samsung.com>,
s.nawrocki@samsung.com, myungjoo.ham@samsung.com,
keescook@chromium.org, tony@atomide.com, jroedel@suse.de,
treding@nvidia.com, digetx@gmail.com, gregkh@linuxfoundation.org,
willy.mh.wolff.ml@gmail.com
Subject: Re: [PATCH v12 3/9] drivers: memory: extend of_memory by LPDDR3 support
Date: Wed, 21 Aug 2019 11:17:27 +0200 [thread overview]
Message-ID: <21d22ba6-2254-ae5e-7ef4-5dfaa3f54229@partner.samsung.com> (raw)
In-Reply-To: <CAJKOXPd96ExoCR-SiJfRqTbwO+_aQ6LSDVOQcrrt8JQHsoZBEw@mail.gmail.com>
Hi Krzysztof,
On 7/24/19 1:31 PM, Krzysztof Kozlowski wrote:
> On Mon, 22 Jul 2019 at 11:47, Lukasz Luba <l.luba@partner.samsung.com> wrote:
>>
>> The patch adds AC timings information needed to support LPDDR3 and memory
>> controllers. The structure is used in of_memory and currently in Exynos
>> 5422 DMC. Add parsing data needed for LPDDR3 support.
>> It is currently used in Exynos5422 Dynamic Memory Controller.
>>
>> Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
>> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
>> ---
>> drivers/memory/jedec_ddr.h | 61 +++++++++++++++
>> drivers/memory/of_memory.c | 154 +++++++++++++++++++++++++++++++++++++
>> drivers/memory/of_memory.h | 18 +++++
>> 3 files changed, 233 insertions(+)
>>
>> diff --git a/drivers/memory/jedec_ddr.h b/drivers/memory/jedec_ddr.h
>> index 4a21b5044ff8..38e26d461bdb 100644
>> --- a/drivers/memory/jedec_ddr.h
>> +++ b/drivers/memory/jedec_ddr.h
>> @@ -29,6 +29,7 @@
>> #define DDR_TYPE_LPDDR2_S4 3
>> #define DDR_TYPE_LPDDR2_S2 4
>> #define DDR_TYPE_LPDDR2_NVM 5
>> +#define DDR_TYPE_LPDDR3 6
>>
>> /* DDR IO width */
>> #define DDR_IO_WIDTH_4 1
>> @@ -169,4 +170,64 @@ extern const struct lpddr2_timings
>> lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES];
>> extern const struct lpddr2_min_tck lpddr2_jedec_min_tck;
>>
>> +/*
>> + * Structure for timings for LPDDR3 based on LPDDR2 plus additional fields.
>> + * All parameters are in pico seconds(ps) unless explicitly indicated
>> + * with a suffix like tRAS_max_ns below
>
> To which tRAS_max_ns are you referring?
The comment failed to stand the test of time, not for the first time
though. I will update it according to the current struct.
>
>> + */
>> +struct lpddr3_timings {
>> + u32 max_freq;
>> + u32 min_freq;
>> + u32 tRFC;
>> + u32 tRRD;
>> + u32 tRPab;
>> + u32 tRPpb;
>> + u32 tRCD;
>> + u32 tRC;
>> + u32 tRAS;
>> + u32 tWTR;
>> + u32 tWR;
>> + u32 tRTP;
>> + u32 tW2W_C2C;
>> + u32 tR2R_C2C;
>> + u32 tWL;
>> + u32 tDQSCK;
>> + u32 tRL;
>> + u32 tFAW;
>> + u32 tXSR;
>> + u32 tXP;
>> + u32 tCKE;
>> + u32 tCKESR;
>> + u32 tMRD;
>> +};
>> +
>> +/*
>> + * Min value for some parameters in terms of number of tCK cycles(nCK)
>> + * Please set to zero parameters that are not valid for a given memory
>> + * type
>> + */
>> +struct lpddr3_min_tck {
>> + u32 tRFC;
>> + u32 tRRD;
>> + u32 tRPab;
>> + u32 tRPpb;
>> + u32 tRCD;
>> + u32 tRC;
>> + u32 tRAS;
>> + u32 tWTR;
>> + u32 tWR;
>> + u32 tRTP;
>> + u32 tW2W_C2C;
>> + u32 tR2R_C2C;
>> + u32 tWL;
>> + u32 tDQSCK;
>> + u32 tRL;
>> + u32 tFAW;
>> + u32 tXSR;
>> + u32 tXP;
>> + u32 tCKE;
>> + u32 tCKESR;
>> + u32 tMRD;
>> +};
>> +
>> #endif /* __JEDEC_DDR_H */
>> diff --git a/drivers/memory/of_memory.c b/drivers/memory/of_memory.c
>> index 46539b27a3fb..4f5b8c81669f 100644
>> --- a/drivers/memory/of_memory.c
>> +++ b/drivers/memory/of_memory.c
>> @@ -3,6 +3,12 @@
>> * OpenFirmware helpers for memory drivers
>> *
>> * Copyright (C) 2012 Texas Instruments, Inc.
>> + * Copyright (C) 2019 Samsung Electronics Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> */
>>
>> #include <linux/device.h>
>> @@ -149,3 +155,151 @@ const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr,
>> return lpddr2_jedec_timings;
>> }
>> EXPORT_SYMBOL(of_get_ddr_timings);
>> +
>> +/**
>> + * of_lpddr3_get_min_tck() - extract min timing values for lpddr3
>> + * @np: pointer to ddr device tree node
>> + * @device: device requesting for min timing values
>> + *
>> + * Populates the lpddr3_min_tck structure by extracting data
>> + * from device tree node. Returns a pointer to the populated
>> + * structure. If any error in populating the structure, returns NULL.
>> + */
>> +const struct lpddr3_min_tck *of_lpddr3_get_min_tck(struct device_node *np,
>> + struct device *dev)
>> +{
>> + int ret = 0;
>> + struct lpddr3_min_tck *min;
>> +
>> + min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
>> + if (!min)
>> + goto default_min_tck;
>> +
>> + ret |= of_property_read_u32(np, "tRFC-min-tck", &min->tRFC);
>> + ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
>> + ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
>> + ret |= of_property_read_u32(np, "tRPpb-min-tck", &min->tRPpb);
>> + ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
>> + ret |= of_property_read_u32(np, "tRC-min-tck", &min->tRC);
>> + ret |= of_property_read_u32(np, "tRAS-min-tck", &min->tRAS);
>> + ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
>> + ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
>> + ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
>> + ret |= of_property_read_u32(np, "tW2W-C2C-min-tck", &min->tW2W_C2C);
>> + ret |= of_property_read_u32(np, "tR2R-C2C-min-tck", &min->tR2R_C2C);
>> + ret |= of_property_read_u32(np, "tWL-min-tck", &min->tWL);
>> + ret |= of_property_read_u32(np, "tDQSCK-min-tck", &min->tDQSCK);
>> + ret |= of_property_read_u32(np, "tRL-min-tck", &min->tRL);
>> + ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
>> + ret |= of_property_read_u32(np, "tXSR-min-tck", &min->tXSR);
>> + ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
>> + ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
>> + ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
>> + ret |= of_property_read_u32(np, "tMRD-min-tck", &min->tMRD);
>> +
>> + if (ret) {
>> + dev_warn(dev, "%s: errors while parsing min-tck values\n",
>> + __func__);
>> + devm_kfree(dev, min);
>> + goto default_min_tck;
>> + }
>> +
>> + return min;
>> +
>> +default_min_tck:
>> + dev_warn(dev, "%s: using default min-tck values\n", __func__);
>
> Here and later - you return NULL, not default values. Your driver -
> consumer - also behaves like with error condition, not like with
> default values. Print just that you cannot get timings, I guess.
OK, thank you. I will change the print.
Thank you for the review.
Regards,
Lukasz
>
> Best regards,
> Krzysztof
>
>
next prev parent reply other threads:[~2019-08-21 9:17 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190722094724eucas1p21d37e28f25f632081f2b0f48ace70826@eucas1p2.samsung.com>
2019-07-22 9:46 ` [PATCH v12 0/9] Exynos5 Dynamic Memory Controller driver Lukasz Luba
[not found] ` <CGME20190722094725eucas1p1c91c43892ef73011bdf554574a1637e0@eucas1p1.samsung.com>
2019-07-22 9:46 ` [PATCH v12 1/9] dt-bindings: ddr: rename lpddr2 directory Lukasz Luba
[not found] ` <CGME20190722094726eucas1p2471055ae10f65df44fa1e640491e528f@eucas1p2.samsung.com>
2019-07-22 9:46 ` [PATCH v12 2/9] dt-bindings: ddr: add LPDDR3 memories Lukasz Luba
[not found] ` <CGME20190722094727eucas1p10041ba25819e6e62d639423a97435f2d@eucas1p1.samsung.com>
2019-07-22 9:46 ` [PATCH v12 3/9] drivers: memory: extend of_memory by LPDDR3 support Lukasz Luba
2019-07-24 11:31 ` Krzysztof Kozlowski
2019-08-21 9:17 ` Lukasz Luba [this message]
2019-07-24 11:39 ` Krzysztof Kozlowski
2019-08-21 9:03 ` Lukasz Luba
[not found] ` <CGME20190722094728eucas1p17e68d3d93202fb089822b376e5d2f37b@eucas1p1.samsung.com>
2019-07-22 9:46 ` [PATCH v12 4/9] dt-bindings: memory-controllers: add Exynos5422 DMC device description Lukasz Luba
[not found] ` <CGME20190722094729eucas1p148196a19d5d33d4b1dfe6c75e7e290ec@eucas1p1.samsung.com>
2019-07-22 9:46 ` [PATCH v12 5/9] drivers: memory: add DMC driver for Exynos5422 Lukasz Luba
[not found] ` <CGME20190722094730eucas1p2f3f8298c43c8bf0d96135bca9a9e753b@eucas1p2.samsung.com>
2019-07-22 9:46 ` [PATCH v12 6/9] ARM: dts: exynos: add chipid label and syscon compatible Lukasz Luba
2019-07-24 17:10 ` Krzysztof Kozlowski
2019-08-21 9:29 ` Lukasz Luba
[not found] ` <CGME20190722094731eucas1p20a1dd09d90eef3415a37e7fc86efe2df@eucas1p2.samsung.com>
2019-07-22 9:46 ` [PATCH v12 7/9] ARM: dts: exynos: add syscon to clock compatible Lukasz Luba
[not found] ` <CGME20190722094732eucas1p1bd2c7e20744637f9f48f40be71db0168@eucas1p1.samsung.com>
2019-07-22 9:46 ` [PATCH v12 8/9] ARM: dts: exynos: add DMC device for exynos5422 Lukasz Luba
[not found] ` <CGME20190722094733eucas1p1a0294a332b11aed42124308c5d204e62@eucas1p1.samsung.com>
2019-07-22 9:46 ` [PATCH v12 9/9] ARM: exynos_defconfig: enable DMC driver Lukasz Luba
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=21d22ba6-2254-ae5e-7ef4-5dfaa3f54229@partner.samsung.com \
--to=l.luba@partner.samsung.com \
--cc=b.zolnierkie@samsung.com \
--cc=cw00.choi@samsung.com \
--cc=devicetree@vger.kernel.org \
--cc=digetx@gmail.com \
--cc=gregkh@linuxfoundation.org \
--cc=jroedel@suse.de \
--cc=keescook@chromium.org \
--cc=kgene@kernel.org \
--cc=krzk@kernel.org \
--cc=kyungmin.park@samsung.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=m.szyprowski@samsung.com \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=myungjoo.ham@samsung.com \
--cc=robh+dt@kernel.org \
--cc=s.nawrocki@samsung.com \
--cc=sboyd@kernel.org \
--cc=tony@atomide.com \
--cc=treding@nvidia.com \
--cc=willy.mh.wolff.ml@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).