From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32C83C2D0D2 for ; Tue, 24 Dec 2019 14:36:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 07B732075E for ; Tue, 24 Dec 2019 14:36:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UENJhR05" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726201AbfLXOg0 (ORCPT ); Tue, 24 Dec 2019 09:36:26 -0500 Received: from mail-il1-f196.google.com ([209.85.166.196]:44618 "EHLO mail-il1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726128AbfLXOgZ (ORCPT ); Tue, 24 Dec 2019 09:36:25 -0500 Received: by mail-il1-f196.google.com with SMTP id z12so16670606iln.11; Tue, 24 Dec 2019 06:36:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=G9zkxlG0xGgO+RRXE1qCUqKdI6X1YDvo84gC40D1YMA=; b=UENJhR05eMmRMNkdU0xPT2lQ/MGiaGVITW2wEVcWT6xP2cqYXBd21PJhRVC920AKui la7e9Rbd+AfDd4SZoUH84TqdjqDPvRRMkYrkv7tFNQ8XGe9rHSDuyWhs6MK5iSVg9U48 E+zo3OfxE/aZLdAmkAoXF9lHEFGfUw1IDWAmjEiHRMtL12Z64BzbYacl8cOXf3+45rxM d/0cKP7ASJBLO6vWHdaqomKHvQ//Ky+qhfbT1LjXuJ/BaTyeqVOSNREBybSbNeB3YfNp 0W+/QEW1BOW0GzCqgcp1MFbhlPpxXBdxr4EjyiBxplu8yhKY93f6gPA8bRE3FCQcfWPp 588w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=G9zkxlG0xGgO+RRXE1qCUqKdI6X1YDvo84gC40D1YMA=; b=f6ov9Enz63COcAeZQ3ryU2TiJYCIx/l9Me88mLln3yP9R1ieH6JYLZ1MVogKqqoFNp zzLTMj6JLyHVtqG/qnHmCzb43PUU2LCDdGkCHHJhgSLmQUiZQ+3XNUXA/qlYKRzjEUlo MqknOL4VFKE9bdDH3td77+IVafWHLLQ2ZwXxIxlPjfxUagCdYEijmDkiJjD0fGpj9dih TxrGU5sOK53j5lhdYPeqWXSoFjdw0espSQZDiCeo+7Mk7KMSNk8bJpUM5TdZ5+Jrre4t QV3OtnUOUATAwDpjuZLM1GlNASjlQa+7Fn3hj7zkjen9DyWznGBodXM20iN7W3qzYSnO 03Cg== X-Gm-Message-State: APjAAAVuOdePSmLI+Hmf9PP+z9MIwtcM4BBfJNB3yquW68Jxjbcwgpcn ggmY69kh1erXUUKvVHRrKEiHwAPUaSNDiZoOTbg= X-Google-Smtp-Source: APXvYqxG8pDiLHd5VSObHKHTgDMwnSvIsqwUj8mvUXwF+9cHnHTohFIFhPuHUPAw+Ib0CQ5GMcRS40lNr5fQh583H3g= X-Received: by 2002:a92:1a0a:: with SMTP id a10mr30442586ila.295.1577198184778; Tue, 24 Dec 2019 06:36:24 -0800 (PST) MIME-Version: 1.0 References: <20191219172823.1652600-1-anarsoul@gmail.com> <20191224131155.GA17359@Red> In-Reply-To: <20191224131155.GA17359@Red> From: Frank Lee Date: Tue, 24 Dec 2019 22:36:13 +0800 Message-ID: Subject: Re: [PATCH v8 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 To: Corentin Labbe Cc: Vasily Khoruzhick , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Mauro Carvalho Chehab , "David S. Miller" , Greg Kroah-Hartman , Linux PM , devicetree , Linux ARM , =?UTF-8?Q?Ond=C5=99ej_Jirman?= , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Tue, Dec 24, 2019 at 9:11 PM Corentin Labbe wrote: > > On Thu, Dec 19, 2019 at 09:28:16AM -0800, Vasily Khoruzhick wrote: > > This patchset adds driver for thermal sensor in A64, A83T, H3, H5, > > H6 and R40 SoCs. > > > > v8: > > - [vasily] Address more Maxime's comments for dt-schema > > - [vasily] Add myself to MAINTAINERS for the driver and schema > > - [vasily] Round calibration data size to word boundary for H6 and A64 > > - [vasily] Change offset for A64 since it reports too low temp otherwise. > > Likely conversion formula in user manual is not correct. > > > > v7: > > - [vasily] Address Maxime's comments for dt-schema > > - [vasily] Move common part of H3 and H5 dts into sunxi-h3-h5.dtsi > > - [vasily] Add Maxime's a-b to the driver patch > > > > v6: > > - [ondrej, vasily] Squash all driver related changes into a > > single patch > > - [ondrej] Rename calib -> calibration > > - [ondrej] Fix thermal zone registration check > > - [ondrej] Lower rate of sensor data interrupts to 4/sec/sensor > > - [ondrej] Rework scale/offset values, H6 calibration > > - [ondrej] Explicitly set mod clock to 24 MHz > > - [ondrej] Set undocumented bits in CTRL0 for H6 > > - [ondrej] Add support for A83T > > - [ondrej] Add dts changes for A83T, H3, H5, H6 > > - [vasily] Add dts changes for A64 > > - [vasily] Address Maxime's comments for YAML scheme > > - [vasily] Make .calc_temp callback mandatory > > - [vasily] Set .max_register in regmap config, so regs can be > > inspected using debugfs > > > > Ondrej Jirman (4): > > ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones > > ARM: dts: sun8i-h3: Add thermal sensor and thermal zones > > arm64: dts: allwinner: h5: Add thermal sensor and thermal zones > > arm64: dts: allwinner: h6: Add thermal sensor and thermal zones > > > > Vasily Khoruzhick (1): > > arm64: dts: allwinner: a64: Add thermal sensors and thermal zones > > > > Yangtao Li (2): > > thermal: sun8i: add thermal driver for H6/H5/H3/A64/A83T/R40 > > dt-bindings: thermal: add YAML schema for sun8i-thermal driver > > bindings > > > > .../thermal/allwinner,sun8i-a83t-ths.yaml | 160 +++++ > > MAINTAINERS | 8 + > > arch/arm/boot/dts/sun8i-a83t.dtsi | 36 + > > arch/arm/boot/dts/sun8i-h3.dtsi | 20 + > > arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 + > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 42 ++ > > arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 26 + > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 + > > drivers/thermal/Kconfig | 14 + > > drivers/thermal/Makefile | 1 + > > drivers/thermal/sun8i_thermal.c | 639 ++++++++++++++++++ > > 11 files changed, 985 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > create mode 100644 drivers/thermal/sun8i_thermal.c > > > > -- > > 2.24.1 > > > > Hello > > Thanks for your work. > > Tested-by: Corentin Labbe > Tested-on: sun50i-h6-pine-h64-model-b > Tested-on: sun50i-h6-pine-h64 > Tested-on: sun8i-a83t-bananapi-m3 > Tested-on: sun8i-h2-plus-orangepi-zero > Tested-on: sun8i-h2-plus-orangepi-r1 > Tested-on: sun8i-h2-plus-libretech-all-h3-cc > Tested-on: sun8i-h3-libretech-all-h3-cc > Tested-on: sun50i-h5-libretech-all-h3-cc > Tested-on: sun50i-a64-pine64-plus > > Note that your patch serie support R40 but you do not have any R40 DT patch. > If you need testing, do not hesitate to ask. How about this? No one has yet added the R40's SID, and I'm not sure about the available size of the sid. So the current therm sensor is not calibrated, hope this is available. diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 421dfbbfd7ee..8ccda5cb873f 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -46,6 +46,7 @@ #include #include #include +#include / { #address-cells = <1>; @@ -109,6 +110,22 @@ status = "disabled"; }; + thermal-zones { + cpu_thermal: cpu0-thermal { + /* milliseconds */ + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; + }; + + gpu_thermal: gpu-thermal { + /* milliseconds */ + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -421,6 +438,17 @@ clocks = <&osc24M>; }; + ths: thermal-sensor@1c24c00 { + compatible = "allwinner,sun8i-r40-ths"; + reg = <0x01c24c00 0x100>; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "bus", "mod"; + interrupts = ; + resets = <&ccu RST_BUS_THS>; + /* TODO: add nvmem-cells for calibration */ + #thermal-sensor-cells = <1>; + }; + uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index 23a5f4aa4be4..c5661d7c3e20 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -565,7 +565,7 @@ static const struct ths_thermal_chip sun8i_h3_ths = { }; static const struct ths_thermal_chip sun8i_r40_ths = { - .sensor_num = 3, + .sensor_num = 2, .offset = 251086, .scale = 1130, .has_mod_clk = true, MBR, Yangtao > > Regards