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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: vFGqizbOGjSbppZmrbLaRekQpzEObVzzRVo5hspwXBdvWgcSRUl7pVU/p68sNmAlK7u/f670yoGU7uqSvevBAmizLpi8PwxXWv1QyqSKI4QmEolhG9LA+WFmRSjYjnhqxWqPihDyAwRnKgmLxaU2g7hUuo0tihDVnBFOzfP0dEwr+OlTQz3bwXvMna2ZnzNpDZjNpe9aljbhXERDMmJySXbtd7xLtf0t5BpJ5/GGyvJPmc/HW1znyIGD0GJlMCSVvFGfEdVexuV/vIrznOc7rSsYOwVaqmC4fWqvb3/roWbHgCEWgVFRcGVHPxqoh1D+i2OFGJUkDl8OuEtfxrhtAjyGxF87vfT2PPt6FMemsTViENPz12+2rHGDh/g4WaziE9GWYS5Szi2Sr+DWVcsKIZRkqQaY0XRyLDqNj7ZOfm4= Content-Type: text/plain; charset="iso-8859-2" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 03bd23e7-bf29-4f2c-2721-08d71f8e1f46 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Aug 2019 01:32:36.4892 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: rP8tIh8ndc5H9FJkZhfSeZbs1WqownX8g+ffCeKzyEVLfi0kg3TfGzzF3spBBN1d3NFxlwufQEhst3CUd8zZAw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6848 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On 8/12/2019 10:47 PM, Rob Herring wrote:=0A= > On Mon, Aug 12, 2019 at 12:49 PM Leonard Crestez wrote:=0A= =0A= >> Add initial dt bindings for the interconnects inside i.MX chips.=0A= >> Multiple external IPs are involved but SOC integration means the=0A= >> software controllable interfaces are very similar.=0A= >>=0A= >> +description: |=0A= >> + The i.MX SoC family has multiple buses for which clock frequency (and= sometimes=0A= >> + voltage) can be adjusted.=0A= >> +=0A= >> + Some of those buses expose register areas mentioned in the memory map= s as GPV=0A= >> + ("Global Programmers View") but not all. Access to this area might be= denied for=0A= >> + normal world.=0A= >> +=0A= >> + The buses are based on externally licensed IPs such as ARM NIC-301 an= d Arteris=0A= >> + FlexNOC but DT bindings are specific to the integration of these bus= =0A= >> + interconnect IPs into imx SOCs.=0A= > =0A= > No need to use the interconnect binding?=0A= =0A= Separate RFC: https://patchwork.kernel.org/patch/11078673/=0A= =0A= The interconnect is represented by a separate "virtual" node which might = =0A= not be OK. There was also a recent RFC from samsung which turns devfreq =0A= nodes into interconnect providers:=0A= https://patchwork.kernel.org/cover/11054417/=0A= =0A= Is that preferable?=0A= =0A= >> +required:=0A= >> + - compatible=0A= >> + - clocks=0A= > =0A= > reg?=0A= =0A= This is deliberately optional: for some NICs the GPV register area is =0A= not exposed in the memory map. This is unusual but an accurate =0A= description of the hardware.=0A= =0A= The current driver doesn't even attempt to map registers, it only =0A= adjusts the clock.=0A= =0A= >> +examples:=0A= >> + - |=0A= >> + #include =0A= >> + noc: noc@32700000 {=0A= >> + compatible =3D "fsl,imx8mm-noc", "fsl,imx8m-noc";=0A= > =0A= > Doesn't match the schema. (Well, it does with 'contains', but=0A= > fsl,imx8mm-noc is not documented.)=0A= =0A= I'm confused about how per-SOC compatible strings works with validation. = =0A= There is a rule that every SOC dtsi needs to add soc prefix to all =0A= device nodes but of_device_id in driver code doesn't need to be updated.=0A= =0A= Without using "contains" on the "compatible" property then all =0A= SOC-specific compatible strings would need to be mentioned in every yaml = =0A= files. Unless I'm missing something this means updating update every =0A= binding file for each new SOC?=0A= =0A= I guess it can be useful because it also validates the compatible =0A= sequence itself.=0A= =0A= For this current example something like this seems to work:=0A= =0A= compatible:=0A= oneOf:=0A= - items:=0A= - enum:=0A= - fsl,imx8mm-nic=0A= - fsl,imx8mq-nic=0A= - const: fsl,imx8m-nic=0A= - items:=0A= - enum:=0A= - fsl,imx8mm-noc=0A= - fsl,imx8mq-noc=0A= - const: fsl,imx8m-noc=0A= =0A= --=0A= Regards,=0A= Leonard=0A=