From: Chanwoo Choi <cw00.choi@samsung.com>
To: Leonard Crestez <leonard.crestez@nxp.com>,
Georgi Djakov <georgi.djakov@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: Alexandre Bailon <abailon@baylibre.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Jacky Bai <ping.bai@nxp.com>, Anson Huang <Anson.Huang@nxp.com>,
Abel Vesa <abel.vesa@nxp.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Saravana Kannan <saravanak@google.com>,
Mark Rutland <mark.rutland@arm.com>,
Viresh Kumar <viresh.kumar@linaro.org>,
Shawn Guo <shawnguo@kernel.org>,
Dong Aisheng <aisheng.dong@nxp.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Matthias Kaehlcke <mka@chromium.org>,
Angus Ainslie <angus@akkea.ca>,
Martin Kepplinger <martink@posteo.de>,
Silvano di Ninno <silvano.dininno@nxp.com>,
linux-pm@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH RFC v6 1/9] dt-bindings: interconnect: Add bindings for imx8m noc
Date: Mon, 16 Dec 2019 10:12:16 +0900 [thread overview]
Message-ID: <c1c03b30-d82a-6f2b-156d-0e1948e0df5b@samsung.com> (raw)
In-Reply-To: <6db2ce55ee62dd8548aa8e1e0ecdf8c06eda868f.1573761527.git.leonard.crestez@nxp.com>
On 11/15/19 5:09 AM, Leonard Crestez wrote:
> Add initial dt bindings for the interconnects inside i.MX chips.
> Multiple external IPs are involved but SOC integration means the
> software controllable interfaces are very similar.
>
> Main NOC node acts as interconnect provider if #interconnect-cells is
> present.
>
> Multiple interconnects can be present, each with their own OPP table.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> ---
> .../bindings/interconnect/fsl,imx8m-noc.yaml | 104 ++++++++++++++++++
> 1 file changed, 104 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml
>
> diff --git a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml
> new file mode 100644
> index 000000000000..5cd94185fec3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml
> @@ -0,0 +1,104 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: https://protect2.fireeye.com/url?k=0c13f3e0-51df3f45-0c1278af-0cc47a30d446-77e809543b673ffd&u=http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml#
> +$schema: https://protect2.fireeye.com/url?k=87c672dc-da0abe79-87c7f993-0cc47a30d446-414d3b4d0127419a&u=http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Generic i.MX bus frequency device
> +
> +maintainers:
> + - Leonard Crestez <leonard.crestez@nxp.com>
> +
> +description: |
> + The i.MX SoC family has multiple buses for which clock frequency (and
> + sometimes voltage) can be adjusted.
> +
> + Some of those buses expose register areas mentioned in the memory maps as GPV
> + ("Global Programmers View") but not all. Access to this area might be denied
> + for normal (non-secure) world.
> +
> + The buses are based on externally licensed IPs such as ARM NIC-301 and
> + Arteris FlexNOC but DT bindings are specific to the integration of these bus
> + interconnect IPs into imx SOCs.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,imx8mn-nic
> + - fsl,imx8mm-nic
> + - fsl,imx8mq-nic
> + - const: fsl,imx8m-nic
> + - items:
> + - enum:
> + - fsl,imx8mn-noc
> + - fsl,imx8mm-noc
> + - fsl,imx8mq-noc
> + - const: fsl,imx8m-noc
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + operating-points-v2: true
> + opp-table: true
> +
> + devfreq:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description:
> + Phandle to another devfreq device to match OPPs with by using the
Better to use 'parent' instead of 'another' word for improving the understanding.
> + passive governor.
> +
> + '#interconnect-cells':
> + description:
> + If specified then also act as an interconnect provider. Should only be
> + set once per soc on main noc.
> + const: 1
> +
> + fsl,scalable-node-ids:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Array of node ids for scalable nodes. Uses same numeric identifier
> + namespace as the consumer "interconnects" binding.
> +
> + fsl,scalable-nodes:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Array of phandles to scalable nodes. Must be of same length as
> + fsl,scalable-node-ids.
> +
> +required:
> + - compatible
> + - clocks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
Is it enough example to understand the relation between
imx8m-ddrc.c, imx-devfreq.c and imx interconnect driver?
In my case, if possible, hope to show the more detailed
example. This example seems that don't contain the ddrc
dt node (imx8m-ddrc.c).
> + #include <dt-bindings/clock/imx8mq-clock.h>
> + #include <dt-bindings/interconnect/imx8mq.h>
> + noc: interconnect@32700000 {
> + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MQ_CLK_NOC>;
> + #interconnect-cells = <1>;
> + fsl,scalable-node-ids = <IMX8MQ_ICN_NOC>,
> + <IMX8MQ_ICS_DRAM>;
> + fsl,scalable-nodes = <&noc>,
> + <&ddrc>;
> + operating-points-v2 = <&noc_opp_table>;
> +
> + noc_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-133M {
> + opp-hz = /bits/ 64 <133333333>;
> + };
> + opp-800M {
> + opp-hz = /bits/ 64 <800000000>;
> + };
> + };
> + };
>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
next prev parent reply other threads:[~2019-12-16 1:05 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-14 20:09 [PATCH RFC v6 0/9] interconnect: Add imx support via devfreq Leonard Crestez
2019-11-14 20:09 ` [PATCH RFC v6 1/9] dt-bindings: interconnect: Add bindings for imx8m noc Leonard Crestez
2019-12-16 1:12 ` Chanwoo Choi [this message]
2019-12-16 3:25 ` Chanwoo Choi
2019-12-16 15:09 ` Leonard Crestez
2019-12-17 0:15 ` Chanwoo Choi
2019-12-19 14:31 ` Leonard Crestez
2019-12-19 15:55 ` Chanwoo Choi
2019-12-19 19:11 ` Leonard Crestez
2019-11-14 20:09 ` [PATCH RFC v6 2/9] PM / devfreq: Add generic imx bus scaling driver Leonard Crestez
2019-11-20 14:08 ` Angus Ainslie
2019-11-20 15:04 ` Leonard Crestez
2019-11-20 15:29 ` Marco Felsch
2019-11-20 15:41 ` Angus Ainslie
2019-11-20 16:30 ` Leonard Crestez
2019-11-20 16:38 ` Angus Ainslie
2019-11-20 18:02 ` Leonard Crestez
2020-02-04 9:45 ` Martin Kepplinger
2020-02-13 10:53 ` Martin Kepplinger
2019-12-13 1:30 ` Chanwoo Choi
2019-12-13 1:51 ` Chanwoo Choi
2019-12-16 1:06 ` Chanwoo Choi
2019-12-16 14:57 ` Leonard Crestez
2019-12-17 0:41 ` Chanwoo Choi
2019-12-17 21:05 ` Leonard Crestez
2019-12-18 3:15 ` Chanwoo Choi
2019-12-18 10:10 ` Leonard Crestez
2019-12-18 10:46 ` Chanwoo Choi
2019-12-18 17:06 ` Chanwoo Choi
2019-11-14 20:09 ` [PATCH RFC v6 3/9] PM / devfreq: imx: Register interconnect device Leonard Crestez
2019-12-13 4:28 ` Chanwoo Choi
2019-12-16 15:00 ` Leonard Crestez
2019-12-17 1:02 ` Chanwoo Choi
2019-12-18 10:13 ` Leonard Crestez
2019-12-18 11:05 ` Chanwoo Choi
2019-12-18 17:13 ` Leonard Crestez
2019-12-19 7:07 ` Chanwoo Choi
2019-11-14 20:09 ` [PATCH RFC v6 4/9] interconnect: Add imx core driver Leonard Crestez
2019-12-12 7:29 ` Georgi Djakov
2019-12-19 0:18 ` Leonard Crestez
2019-11-14 20:09 ` [PATCH RFC v6 5/9] interconnect: imx: Add platform driver for imx8mm Leonard Crestez
2019-12-12 7:35 ` Georgi Djakov
2019-12-16 14:35 ` Leonard Crestez
2019-11-14 20:09 ` [PATCH RFC v6 6/9] interconnect: imx: Add platform driver for imx8mq Leonard Crestez
2019-11-14 20:09 ` [PATCH RFC v6 7/9] interconnect: imx: Add platform driver for imx8mn Leonard Crestez
2019-11-14 20:09 ` [PATCH RFC v6 8/9] arm64: dts: imx8m: Add NOC nodes Leonard Crestez
2019-11-14 20:09 ` [PATCH RFC v6 9/9] arm64: dts: imx8m: Add interconnect provider properties Leonard Crestez
2019-12-11 9:53 ` [PATCH RFC v6 0/9] interconnect: Add imx support via devfreq Leonard Crestez
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