From: Saeed Mahameed <saeedm@mellanox.com>
To: Saeed Mahameed <saeedm@mellanox.com>,
Leon Romanovsky <leonro@mellanox.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-rdma@vger.kernel.org" <linux-rdma@vger.kernel.org>,
Eran Ben Elisha <eranbe@mellanox.com>
Subject: [PATCH mlx5-next 3/5] net/mlx5: Add structures and defines for MIRC register
Date: Wed, 20 Nov 2019 22:22:26 +0000 [thread overview]
Message-ID: <20191120222128.29646-4-saeedm@mellanox.com> (raw)
In-Reply-To: <20191120222128.29646-1-saeedm@mellanox.com>
From: Eran Ben Elisha <eranbe@mellanox.com>
Add needed structures, layouts and defines for MIRC (Management Image
Re-activation Control) register. This structure will be used for the FSM
reactivation flow in the downstream patches.
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
include/linux/mlx5/driver.h | 1 +
include/linux/mlx5/mlx5_ifc.h | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 462c67e2dc13..d479c5e48295 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -145,6 +145,7 @@ enum {
MLX5_REG_MCC = 0x9062,
MLX5_REG_MCDA = 0x9063,
MLX5_REG_MCAM = 0x907f,
+ MLX5_REG_MIRC = 0x9162,
};
enum mlx5_qpts_trust_state {
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 97acbe8cebf8..9107c032062f 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -9456,6 +9456,13 @@ struct mlx5_ifc_mcda_reg_bits {
u8 data[0][0x20];
};
+struct mlx5_ifc_mirc_reg_bits {
+ u8 reserved_at_0[0x18];
+ u8 status_code[0x8];
+
+ u8 reserved_at_20[0x20];
+};
+
union mlx5_ifc_ports_control_registers_document_bits {
struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
@@ -9511,6 +9518,7 @@ union mlx5_ifc_ports_control_registers_document_bits {
struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
struct mlx5_ifc_mcc_reg_bits mcc_reg;
struct mlx5_ifc_mcda_reg_bits mcda_reg;
+ struct mlx5_ifc_mirc_reg_bits mirc_reg;
u8 reserved_at_0[0x60e0];
};
--
2.21.0
next prev parent reply other threads:[~2019-11-20 22:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-20 22:22 [PATCH mlx5-next 0/5] Mellanox, mlx5-next updates 2019-11-20 Saeed Mahameed
2019-11-20 22:22 ` [PATCH mlx5-next 1/5] net/mlx5: Add structures layout for new MCAM access reg groups Saeed Mahameed
2019-11-20 22:22 ` [PATCH mlx5-next 2/5] net/mlx5: Read MCAM register groups 1 and 2 Saeed Mahameed
2019-11-20 22:22 ` Saeed Mahameed [this message]
2019-11-20 22:22 ` [PATCH mlx5-next 4/5] net/mlx5: Don't write read-only fields in MODIFY_HCA_VPORT_CONTEXT command Saeed Mahameed
2019-11-20 22:22 ` [PATCH mlx5-next 5/5] net/mlx5: Expose resource dump register mapping Saeed Mahameed
2019-11-22 21:11 ` [PATCH mlx5-next 0/5] Mellanox, mlx5-next updates 2019-11-20 Saeed Mahameed
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