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From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: joro@8bytes.org
Cc: iommu@lists.linux-foundation.org,
	linux-renesas-soc@vger.kernel.org,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: [PATCH 3/3] iommu/ipmmu-vmsa: Add utlb_offset_base
Date: Wed,  9 Oct 2019 17:26:49 +0900	[thread overview]
Message-ID: <1570609609-1332-4-git-send-email-yoshihiro.shimoda.uh@renesas.com> (raw)
In-Reply-To: <1570609609-1332-1-git-send-email-yoshihiro.shimoda.uh@renesas.com>

Since we will have changed memory mapping of the IPMMU in the future,
this patch adds a utlb_offset_base into struct ipmmu_features
for IMUCTR and IMUASID registers.
No behavior change.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 drivers/iommu/ipmmu-vmsa.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
index 76fb250..bc00e58 100644
--- a/drivers/iommu/ipmmu-vmsa.c
+++ b/drivers/iommu/ipmmu-vmsa.c
@@ -52,6 +52,7 @@ struct ipmmu_features {
 	bool cache_snoop;
 	u32 ctx_offset_base;
 	u32 ctx_offset_stride;
+	u32 utlb_offset_base;
 };
 
 struct ipmmu_vmsa_device {
@@ -285,6 +286,11 @@ static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain,
 	ipmmu_ctx_write_root(domain, reg, data);
 }
 
+static u32 ipmmu_utlb_reg(struct ipmmu_vmsa_device *mmu, unsigned int reg)
+{
+	return mmu->features->utlb_offset_base + reg;
+}
+
 /* -----------------------------------------------------------------------------
  * TLB and microTLB Management
  */
@@ -330,9 +336,9 @@ static void ipmmu_utlb_enable(struct ipmmu_vmsa_domain *domain,
 	 */
 
 	/* TODO: What should we set the ASID to ? */
-	ipmmu_write(mmu, IMUASID(utlb), 0);
+	ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb)), 0);
 	/* TODO: Do we need to flush the microTLB ? */
-	ipmmu_write(mmu, IMUCTR(utlb),
+	ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUCTR(utlb)),
 		    IMUCTR_TTSEL_MMU(domain->context_id) | IMUCTR_FLUSH |
 		    IMUCTR_MMUEN);
 	mmu->utlb_ctx[utlb] = domain->context_id;
@@ -346,7 +352,7 @@ static void ipmmu_utlb_disable(struct ipmmu_vmsa_domain *domain,
 {
 	struct ipmmu_vmsa_device *mmu = domain->mmu;
 
-	ipmmu_write(mmu, IMUCTR(utlb), 0);
+	ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUCTR(utlb)), 0);
 	mmu->utlb_ctx[utlb] = IPMMU_CTX_INVALID;
 }
 
@@ -995,6 +1001,7 @@ static const struct ipmmu_features ipmmu_features_default = {
 	.cache_snoop = true,
 	.ctx_offset_base = 0,
 	.ctx_offset_stride = 0x40,
+	.utlb_offset_base = 0,
 };
 
 static const struct ipmmu_features ipmmu_features_rcar_gen3 = {
@@ -1008,6 +1015,7 @@ static const struct ipmmu_features ipmmu_features_rcar_gen3 = {
 	.cache_snoop = false,
 	.ctx_offset_base = 0,
 	.ctx_offset_stride = 0x40,
+	.utlb_offset_base = 0,
 };
 
 static const struct of_device_id ipmmu_of_ids[] = {
-- 
2.7.4


  parent reply	other threads:[~2019-10-09  8:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-09  8:26 [PATCH 0/3] iommu/ipmmu-vmsa: minor updates Yoshihiro Shimoda
2019-10-09  8:26 ` [PATCH 1/3] iommu/ipmmu-vmsa: Remove some unused register declarations Yoshihiro Shimoda
2019-10-09 21:03   ` Niklas Söderlund
2019-10-11 12:10   ` Geert Uytterhoeven
2019-10-15  5:17     ` Yoshihiro Shimoda
2019-10-09  8:26 ` [PATCH 2/3] iommu/ipmmu-vmsa: Calculate context registers' offset instead of a macro Yoshihiro Shimoda
2019-10-09 21:13   ` Niklas Söderlund
2019-10-11 12:29   ` Geert Uytterhoeven
2019-10-15  5:28     ` Yoshihiro Shimoda
2019-10-09  8:26 ` Yoshihiro Shimoda [this message]
2019-10-09 22:28   ` [PATCH 3/3] iommu/ipmmu-vmsa: Add utlb_offset_base Niklas Söderlund
2019-10-11 12:32   ` Geert Uytterhoeven
2019-10-15  5:28     ` Yoshihiro Shimoda

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