From: Simon Horman <horms@verge.net.au>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: linux-renesas-soc@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 1/4] clk: renesas: rcar-gen3-cpg: factor out cpg_reg_modify()
Date: Fri, 14 Dec 2018 16:32:18 +0100 [thread overview]
Message-ID: <20181214153218.3b3fv5mcj4kl2l3a@verge.net.au> (raw)
In-Reply-To: <8d3bd6b4-61eb-ceef-dc99-eb26c83f9e03@cogentembedded.com>
On Tue, Dec 04, 2018 at 10:48:21PM +0300, Sergei Shtylyov wrote:
> There's quite often repeated sequence of a CPG register read-modify-write,
> so it seems worth factoring it out into a function -- this saves 68 bytes
> of the object code (AArch64 gcc 4.8.5) and simplifies protecting all such
> sequences with a spinlock in the next patch...
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
next prev parent reply other threads:[~2018-12-14 15:32 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 19:43 [PATCH v2 0/4] Renesas R8A77980 CPG/MSSR RPC clock support Sergei Shtylyov
2018-12-04 19:48 ` [PATCH v2 1/4] clk: renesas: rcar-gen3-cpg: factor out cpg_reg_modify() Sergei Shtylyov
2018-12-14 15:32 ` Simon Horman [this message]
2019-01-21 13:25 ` Geert Uytterhoeven
2018-12-04 19:49 ` [PATCH v2 2/4] clk: renesas: rcar-gen3-cpg: add spinlock Sergei Shtylyov
2018-12-14 15:33 ` Simon Horman
2019-01-21 13:40 ` Geert Uytterhoeven
2019-01-21 18:49 ` Sergei Shtylyov
2019-01-21 14:08 ` Geert Uytterhoeven
2018-12-04 19:51 ` [PATCH v2 3/4] clk: renesas: rcar-gen3-cpg: add RPC clocks Sergei Shtylyov
2019-01-21 14:17 ` Geert Uytterhoeven
2018-12-04 19:52 ` [PATCH v2 4/4] clk: renesas: r8a77980-cpg-mssr: " Sergei Shtylyov
2019-01-21 14:18 ` Geert Uytterhoeven
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