From: Simon Horman <horms@verge.net.au>
To: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Cc: linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert@linux-m68k.org>,
Magnus Damm <magnus.damm@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH/RFT] arm64: dts: renesas: r8a77995: Fix register range of display node
Date: Tue, 2 Jul 2019 13:22:47 +0200 [thread overview]
Message-ID: <20190702112246.a5wbikkoccocpzs7@verge.net.au> (raw)
In-Reply-To: <1560802696-19042-1-git-send-email-ykaneko0929@gmail.com>
On Tue, Jun 18, 2019 at 05:18:16AM +0900, Yoshihiro Kaneko wrote:
> Since the R8A77995 SoC uses DU{0,1}, the range from the base address to
> the 0x4000 address is used.
> This patch fixed it.
>
> Fixes: 18f1a773e3f9 ("arm64: dts: renesas: r8a77995: add DU support")
>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
> ---
>
> This patch is based on the devel branch of Simon Horman's renesas tree.
>
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 0a344eb..0567b36 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -995,7 +995,7 @@
>
> du: display@feb00000 {
> compatible = "renesas,du-r8a77995";
> - reg = <0 0xfeb00000 0 0x80000>;
> + reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>,
> --
> 1.9.1
>
next prev parent reply other threads:[~2019-07-02 11:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-17 20:18 [PATCH/RFT] arm64: dts: renesas: r8a77995: Fix register range of display node Yoshihiro Kaneko
2019-07-02 11:22 ` Simon Horman [this message]
2019-07-08 12:22 ` Geert Uytterhoeven
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