RE: [PATCH net-next 02/18] drivers: clk: renesas: rzg2l-cpg: Add support to handle MUX clocks

[Biju Das <biju.das.jz@bp.renesas.com>]

Hi Sergei,

Thanks for the review.

> Subject: Re: [PATCH net-next 02/18] drivers: clk: renesas: rzg2l-cpg: Add
> support to handle MUX clocks
> 
> Hello!
> 
> On 22.07.2021 17:13, Biju Das wrote:
> 
> > Add support to handle mux clocks inorder to select a clock source
> 
>     In order.

Ok.
> 
> > from multiple sources.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> >   drivers/clk/renesas/rzg2l-cpg.c | 24 ++++++++++++++++++++++++
> >   drivers/clk/renesas/rzg2l-cpg.h |  9 +++++++++
> >   2 files changed, 33 insertions(+)
> >
> > diff --git a/drivers/clk/renesas/rzg2l-cpg.c
> > b/drivers/clk/renesas/rzg2l-cpg.c index 3b3b2c3347f3..491b10da5766
> > 100644
> > --- a/drivers/clk/renesas/rzg2l-cpg.c
> > +++ b/drivers/clk/renesas/rzg2l-cpg.c
> > @@ -130,6 +130,27 @@ rzg2l_cpg_div_clk_register(const struct
> cpg_core_clk *core,
> >   	return clk_hw->clk;
> >   }
> >
> > +static struct clk * __init
> > +rzg2l_cpg_mux_clk_register(const struct cpg_core_clk *core,
> > +			   void __iomem *base,
> > +			   struct rzg2l_cpg_priv *priv)
> > +{
> > +	const struct clk_hw *clk_hw;
> > +
> > +	clk_hw = devm_clk_hw_register_mux(priv->dev, core->name,
> > +					  core->parent_names, core->num_parents,
> > +					  core->flag,
> > +					  base + GET_REG_OFFSET(core->conf),
> > +					  GET_SHIFT(core->conf),
> > +					  GET_WIDTH(core->conf),
> > +					  core->mux_flags, &priv->rmw_lock);
> > +
> 
>     Empty line is hardly needed here...

OK. Will fix it in next version.

Cheers,
Biju