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From: Anup Patel <anup@brainfault.org>
To: Palmer Dabbelt <palmer@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoph Hellwig <hch@infradead.org>,
	Atish Patra <atish.patra@wdc.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Anup Patel <anup@brainfault.org>
Subject: [PATCH v6 2/4] irqchip: sifive-plic: Add warning in plic_init() if handler already present
Date: Tue, 12 Feb 2019 18:22:44 +0530	[thread overview]
Message-ID: <20190212125246.69239-3-anup@brainfault.org> (raw)
In-Reply-To: <20190212125246.69239-1-anup@brainfault.org>

We have two enteries (one for M-mode and another for S-mode) in the
interrupts-extended DT property of PLIC DT node for each HART. It is
expected that firmware/bootloader will set M-mode HWIRQ line of each
HART to 0xffffffff (i.e. -1) in interrupts-extended DT property
because Linux runs in S-mode only.

If firmware/bootloader is buggy then it will not correctly update
interrupts-extended DT property which might result in a plic_handler
configured twice. This patch adds a warning in plic_init() if a
plic_handler is already marked present. This warning provides us
a hint about incorrectly updated interrupts-extended DT property.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 drivers/irqchip/irq-sifive-plic.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index c23a293a2aae..da09f46fad64 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -229,6 +229,11 @@ static int __init plic_init(struct device_node *node,
 
 		cpu = riscv_hartid_to_cpuid(hartid);
 		handler = per_cpu_ptr(&plic_handlers, cpu);
+		if (handler->present) {
+			pr_warn("handler already present for context %d.\n", i);
+			continue;
+		}
+
 		handler->present = true;
 		handler->hart_base =
 			plic_regs + CONTEXT_BASE + i * CONTEXT_PER_HART;
-- 
2.17.1


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  parent reply	other threads:[~2019-02-12 12:53 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-12 12:52 [PATCH v6 0/4] IRQ affinity support in PLIC driver Anup Patel
2019-02-12 12:52 ` [PATCH v6 1/4] irqchip: sifive-plic: Pre-compute context hart base and enable base Anup Patel
2019-02-12 12:52 ` Anup Patel [this message]
2019-02-12 12:52 ` [PATCH v6 3/4] irqchip: sifive-plic: Differentiate between PLIC handler and context Anup Patel
2019-02-12 12:52 ` [PATCH v6 4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host Anup Patel
2019-02-14 12:33 ` [PATCH v6 0/4] IRQ affinity support in PLIC driver Marc Zyngier

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